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A 7.4 ps FPGA-Based TDC with a 1024-Unit Measurement Matrix
In this paper, a high-resolution time-to-digital converter (TDC) based on a field programmable gate array (FPGA) device is proposed and tested. During the implementation, a new architecture of TDC is proposed which consists of a measurement matrix with 1024 units. The utilization of routing resource...
| Autores principales: | , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
MDPI
2017
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5424742/ https://www.ncbi.nlm.nih.gov/pubmed/28420121 http://dx.doi.org/10.3390/s17040865 |