Power analysis data set for 4-Bit MOCLA adder

In order to reduce the silicon area of the chip and optimize the power of arithmetic circuits, this paper proposes a low power carry look-ahead BCD (Binary Coded Decimal) adder which uses a four bit MOCLA (Multiplexer and Or gate based Carry Look Ahead Adder) that forms the basic building block. Thi...

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Detalles Bibliográficos
Autor principal: Nehru, K.
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Elsevier 2017
Materias:
Engineering
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5699873/
https://www.ncbi.nlm.nih.gov/pubmed/29201978
http://dx.doi.org/10.1016/j.dib.2017.11.017
Descripción
Sumario:In order to reduce the silicon area of the chip and optimize the power of arithmetic circuits, this paper proposes a low power carry look-ahead BCD (Binary Coded Decimal) adder which uses a four bit MOCLA (Multiplexer and Or gate based Carry Look Ahead Adder) that forms the basic building block. This proposed MOCLA style uses a 2 input MUX, OR gate and GDI (Gate Diffusion Input) based full adder and PG units and it is used for achieving low power in BCD adder circuits.

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