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A 12-Gb/s Stacked Dual-Channel Interface for CMOS Image Sensor Systems
We propose a dual-channel interface architecture that allocates high and low transition-density bit streams to two separate channels. The transmitter utilizes the stacked drivers with charge-recycling to reduce the power consumption. The direct current (DC)-coupled receiver front-end circuits manage...
Autores principales: | Kim, Sang-Hoon, Shin, Hoon, Jeong, Youngkyun, Lee, June-Hee, Choi, Jaehyuk, Chun, Jung-Hoon |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2018
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6112032/ https://www.ncbi.nlm.nih.gov/pubmed/30126145 http://dx.doi.org/10.3390/s18082709 |
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