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A 1.15 μW 200 kS/s 10-b Monotonic SAR ADC Using Dual On-Chip Calibrations and Accuracy Enhancement Techniques
Herein, we present an energy efficient successive-approximation-register (SAR) analog-to-digital converter (ADC) featuring on-chip dual calibration and various accuracy-enhancement techniques. The dual calibration technique is realized in an energy and area-efficient manner for comparator offset cal...
Autores principales: | Lee, Jae-Hun, Park, Dasom, Cho, Woojin, Phan, Huu Nhan, Nguyen, Cong Luong, Lee, Jong-Wook |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2018
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6210042/ https://www.ncbi.nlm.nih.gov/pubmed/30332815 http://dx.doi.org/10.3390/s18103486 |
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