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Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks

A novel low cost interconnected architecture (LCIA) is proposed in this paper, which is an efficient solution for the neuron interconnections for the hardware spiking neural networks (SNNs). It is based on an all-to-all connection that takes each paired input and output nodes of multi-layer SNNs as...

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Autores principales: Luo, Yuling, Wan, Lei, Liu, Junxiu, Harkin, Jim, McDaid, Liam, Cao, Yi, Ding, Xuemei
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Frontiers Media S.A. 2018
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6258738/
https://www.ncbi.nlm.nih.gov/pubmed/30524230
http://dx.doi.org/10.3389/fnins.2018.00857
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author Luo, Yuling
Wan, Lei
Liu, Junxiu
Harkin, Jim
McDaid, Liam
Cao, Yi
Ding, Xuemei
author_facet Luo, Yuling
Wan, Lei
Liu, Junxiu
Harkin, Jim
McDaid, Liam
Cao, Yi
Ding, Xuemei
author_sort Luo, Yuling
collection PubMed
description A novel low cost interconnected architecture (LCIA) is proposed in this paper, which is an efficient solution for the neuron interconnections for the hardware spiking neural networks (SNNs). It is based on an all-to-all connection that takes each paired input and output nodes of multi-layer SNNs as the source and destination of connections. The aim is to maintain an efficient routing performance under low hardware overhead. A Networks-on-Chip (NoC) router is proposed as the fundamental component of the LCIA, where an effective scheduler is designed to address the traffic challenge due to irregular spikes. The router can find requests rapidly, make the arbitration decision promptly, and provide equal services to different network traffic requests. Experimental results show that the LCIA can manage the intercommunication of the multi-layer neural networks efficiently and have a low hardware overhead which can maintain the scalability of hardware SNNs.
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spelling pubmed-62587382018-12-06 Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks Luo, Yuling Wan, Lei Liu, Junxiu Harkin, Jim McDaid, Liam Cao, Yi Ding, Xuemei Front Neurosci Neuroscience A novel low cost interconnected architecture (LCIA) is proposed in this paper, which is an efficient solution for the neuron interconnections for the hardware spiking neural networks (SNNs). It is based on an all-to-all connection that takes each paired input and output nodes of multi-layer SNNs as the source and destination of connections. The aim is to maintain an efficient routing performance under low hardware overhead. A Networks-on-Chip (NoC) router is proposed as the fundamental component of the LCIA, where an effective scheduler is designed to address the traffic challenge due to irregular spikes. The router can find requests rapidly, make the arbitration decision promptly, and provide equal services to different network traffic requests. Experimental results show that the LCIA can manage the intercommunication of the multi-layer neural networks efficiently and have a low hardware overhead which can maintain the scalability of hardware SNNs. Frontiers Media S.A. 2018-11-21 /pmc/articles/PMC6258738/ /pubmed/30524230 http://dx.doi.org/10.3389/fnins.2018.00857 Text en Copyright © 2018 Luo, Wan, Liu, Harkin, McDaid, Cao and Ding. http://creativecommons.org/licenses/by/4.0/ This is an open-access article distributed under the terms of the Creative Commons Attribution License (CC BY). The use, distribution or reproduction in other forums is permitted, provided the original author(s) and the copyright owner(s) are credited and that the original publication in this journal is cited, in accordance with accepted academic practice. No use, distribution or reproduction is permitted which does not comply with these terms.
spellingShingle Neuroscience
Luo, Yuling
Wan, Lei
Liu, Junxiu
Harkin, Jim
McDaid, Liam
Cao, Yi
Ding, Xuemei
Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks
title Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks
title_full Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks
title_fullStr Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks
title_full_unstemmed Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks
title_short Low Cost Interconnected Architecture for the Hardware Spiking Neural Networks
title_sort low cost interconnected architecture for the hardware spiking neural networks
topic Neuroscience
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6258738/
https://www.ncbi.nlm.nih.gov/pubmed/30524230
http://dx.doi.org/10.3389/fnins.2018.00857
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