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Selectivity Map for Molecular Beam Epitaxy of Advanced III–V Quantum Nanowire Networks
[Image: see text] Selective-area growth is a promising technique for enabling of the fabrication of the scalable III–V nanowire networks required to test proposals for Majorana-based quantum computing devices. However, the contours of the growth parameter window resulting in selective growth remain...
Autores principales: | , , , , , , , , , , , , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
American
Chemical
Society
2018
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Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6331184/ https://www.ncbi.nlm.nih.gov/pubmed/30521341 http://dx.doi.org/10.1021/acs.nanolett.8b03733 |
Sumario: | [Image: see text] Selective-area growth is a promising technique for enabling of the fabrication of the scalable III–V nanowire networks required to test proposals for Majorana-based quantum computing devices. However, the contours of the growth parameter window resulting in selective growth remain undefined. Herein, we present a set of experimental techniques that unambiguously establish the parameter space window resulting in selective III–V nanowire networks growth by molecular beam epitaxy. Selectivity maps are constructed for both GaAs and InAs compounds based on in situ characterization of growth kinetics on GaAs(001) substrates, where the difference in group III adatom desorption rates between the III–V surface and the amorphous mask area is identified as the primary mechanism governing selectivity. The broad applicability of this method is demonstrated by the successful realization of high-quality InAs and GaAs nanowire networks on GaAs, InP, and InAs substrates of both (001) and (111)B orientations as well as homoepitaxial InSb nanowire networks. Finally, phase coherence in Aharonov–Bohm ring experiments validates the potential of these crystals for nanoelectronics and quantum transport applications. This work should enable faster and better nanoscale crystal engineering over a range of compound semiconductors for improved device performance. |
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