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Process Variability—Technological Challenge and Design Issue for Nanoscale Devices
Current advanced transistor architectures, such as FinFETs and (stacked) nanowires and nanosheets, employ truly three-dimensional architectures. Already for aggressively scaled bulk transistors, both statistical and systematic process variations have critically influenced device and circuit performa...
| Autores principales: | , , , , , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
MDPI
2018
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6356361/ https://www.ncbi.nlm.nih.gov/pubmed/30583573 http://dx.doi.org/10.3390/mi10010006 |