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Mitigation of harmonics and unbalanced source voltage condition in standalone microgrid: positive sequence component and dynamic phasor based compensator with real-time approach
Penetration of Distributed Energy Resources (DER) is in high demand to supply power to the load where the grid is not available. Many of these sources are a single phase source used to form standalone Microgrid (MG). Single phase connectivity of these sources results in an unbalanced source voltage...
Autores principales: | , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Elsevier
2019
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6366151/ https://www.ncbi.nlm.nih.gov/pubmed/30839949 http://dx.doi.org/10.1016/j.heliyon.2019.e01178 |
Sumario: | Penetration of Distributed Energy Resources (DER) is in high demand to supply power to the load where the grid is not available. Many of these sources are a single phase source used to form standalone Microgrid (MG). Single phase connectivity of these sources results in an unbalanced source voltage condition (UbSVC). Interfacing power electronic devices also inject the harmonics into Point of Common Coupling (PCC) voltage. The effect of this unbalance and harmonics on the operation of standalone MG is analysed in this paper in a twofold manner. One at a reduced power transfer from DER to load and the other is an error produced in Phase Locked Loop (PLL) operation. Positive Sequence Component (PSC) based and Dynamic Phasor (DP) based compensation techniques are proposed in this paper to mitigate the effect of UbSVC. Simulation validates that both the proposed methods are capable to provide balanced load voltage condition under UbSVC in terms of Voltage Unbalance Factor ([Formula: see text]). It also enhances the power transferred from DER to load during an UbSVC. The performance of the proposed compensator during UbSVC and harmonic presence is validated in real-time simulation using Opal-RT and dSPACE simulators. |
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