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FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications

Recently, extensive convolutional neural network (CNN)-based methods have been used in remote sensing applications, such as object detection and classification, and have achieved significant improvements in performance. Furthermore, there are a lot of hardware implementation demands for remote sensi...

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Autores principales: Wei, Xin, Liu, Wenchao, Chen, Lei, Ma, Long, Chen, He, Zhuang, Yin
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2019
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6412419/
https://www.ncbi.nlm.nih.gov/pubmed/30813259
http://dx.doi.org/10.3390/s19040924
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author Wei, Xin
Liu, Wenchao
Chen, Lei
Ma, Long
Chen, He
Zhuang, Yin
author_facet Wei, Xin
Liu, Wenchao
Chen, Lei
Ma, Long
Chen, He
Zhuang, Yin
author_sort Wei, Xin
collection PubMed
description Recently, extensive convolutional neural network (CNN)-based methods have been used in remote sensing applications, such as object detection and classification, and have achieved significant improvements in performance. Furthermore, there are a lot of hardware implementation demands for remote sensing real-time processing applications. However, the operation and storage processes in floating-point models hinder the deployment of networks in hardware implements with limited resource and power budgets, such as field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). To solve this problem, this paper focuses on optimizing the hardware design of CNN with low bit-width integers by quantization. First, a symmetric quantization scheme-based hybrid-type inference method was proposed, which uses the low bit-width integer to replace floating-point precision. Then, a training approach for the quantized network is introduced to reduce accuracy degradation. Finally, a processing engine (PE) with a low bit-width is proposed to optimize the hardware design of FPGA for remote sensing image classification. Besides, a fused-layer PE is also presented for state-of-the-art CNNs equipped with Batch-Normalization and LeakyRelu. The experiments performed on the Moving and Stationary Target Acquisition and Recognition (MSTAR) dataset using a graphics processing unit (GPU) demonstrate that the accuracy of 8-bit quantized model drops by about 1%, which is an acceptable accuracy loss. The accuracy result tested on FPGA is consistent with that of GPU. As for the resource consumptions of FPGA, the Look Up Table (LUT), Flip-flop (FF), Digital Signal Processor (DSP), and Block Random Access Memory (BRAM) are reduced by 46.21%, 43.84%, 45%, and 51%, respectively, compared with that of floating-point implementation.
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spelling pubmed-64124192019-04-03 FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications Wei, Xin Liu, Wenchao Chen, Lei Ma, Long Chen, He Zhuang, Yin Sensors (Basel) Article Recently, extensive convolutional neural network (CNN)-based methods have been used in remote sensing applications, such as object detection and classification, and have achieved significant improvements in performance. Furthermore, there are a lot of hardware implementation demands for remote sensing real-time processing applications. However, the operation and storage processes in floating-point models hinder the deployment of networks in hardware implements with limited resource and power budgets, such as field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). To solve this problem, this paper focuses on optimizing the hardware design of CNN with low bit-width integers by quantization. First, a symmetric quantization scheme-based hybrid-type inference method was proposed, which uses the low bit-width integer to replace floating-point precision. Then, a training approach for the quantized network is introduced to reduce accuracy degradation. Finally, a processing engine (PE) with a low bit-width is proposed to optimize the hardware design of FPGA for remote sensing image classification. Besides, a fused-layer PE is also presented for state-of-the-art CNNs equipped with Batch-Normalization and LeakyRelu. The experiments performed on the Moving and Stationary Target Acquisition and Recognition (MSTAR) dataset using a graphics processing unit (GPU) demonstrate that the accuracy of 8-bit quantized model drops by about 1%, which is an acceptable accuracy loss. The accuracy result tested on FPGA is consistent with that of GPU. As for the resource consumptions of FPGA, the Look Up Table (LUT), Flip-flop (FF), Digital Signal Processor (DSP), and Block Random Access Memory (BRAM) are reduced by 46.21%, 43.84%, 45%, and 51%, respectively, compared with that of floating-point implementation. MDPI 2019-02-22 /pmc/articles/PMC6412419/ /pubmed/30813259 http://dx.doi.org/10.3390/s19040924 Text en © 2019 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).
spellingShingle Article
Wei, Xin
Liu, Wenchao
Chen, Lei
Ma, Long
Chen, He
Zhuang, Yin
FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications
title FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications
title_full FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications
title_fullStr FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications
title_full_unstemmed FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications
title_short FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications
title_sort fpga-based hybrid-type implementation of quantized neural networks for remote sensing applications
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6412419/
https://www.ncbi.nlm.nih.gov/pubmed/30813259
http://dx.doi.org/10.3390/s19040924
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