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Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training

A real memristor crossbar has defects, which should be considered during the retraining time after the pre-training of the crossbar. For retraining the crossbar with defects, memristors should be updated with the weights that are calculated by the back-propagation algorithm. Unfortunately, programmi...

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Autores principales: Pham, Khoa Van, Nguyen, Tien Van, Min, Kyeong-Sik
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2019
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6523436/
https://www.ncbi.nlm.nih.gov/pubmed/31013938
http://dx.doi.org/10.3390/mi10040245
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author Pham, Khoa Van
Nguyen, Tien Van
Min, Kyeong-Sik
author_facet Pham, Khoa Van
Nguyen, Tien Van
Min, Kyeong-Sik
author_sort Pham, Khoa Van
collection PubMed
description A real memristor crossbar has defects, which should be considered during the retraining time after the pre-training of the crossbar. For retraining the crossbar with defects, memristors should be updated with the weights that are calculated by the back-propagation algorithm. Unfortunately, programming the memristors takes a very long time and consumes a large amount of power, because of the incremental behavior of memristor’s program-verify scheme for the fine-tuning of memristor’s conductance. To reduce the programming time and power, the partial gating scheme is proposed here to realize the partial training, where only some part of neurons are trained, which are more responsible in the recognition error. By retraining the part, rather than the entire crossbar, the programming time and power of memristor crossbar can be significantly reduced. The proposed scheme has been verified by CADENCE circuit simulation with the real memristor’s Verilog-A model. When compared to retraining the entire crossbar, the loss of recognition rate of the partial gating scheme has been estimated only as small as 2.5% and 2.9%, for the MNIST and CIFAR-10 datasets, respectively. However, the programming time and power can be saved by 86% and 89.5% than the 100% retraining, respectively.
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spelling pubmed-65234362019-06-03 Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training Pham, Khoa Van Nguyen, Tien Van Min, Kyeong-Sik Micromachines (Basel) Article A real memristor crossbar has defects, which should be considered during the retraining time after the pre-training of the crossbar. For retraining the crossbar with defects, memristors should be updated with the weights that are calculated by the back-propagation algorithm. Unfortunately, programming the memristors takes a very long time and consumes a large amount of power, because of the incremental behavior of memristor’s program-verify scheme for the fine-tuning of memristor’s conductance. To reduce the programming time and power, the partial gating scheme is proposed here to realize the partial training, where only some part of neurons are trained, which are more responsible in the recognition error. By retraining the part, rather than the entire crossbar, the programming time and power of memristor crossbar can be significantly reduced. The proposed scheme has been verified by CADENCE circuit simulation with the real memristor’s Verilog-A model. When compared to retraining the entire crossbar, the loss of recognition rate of the partial gating scheme has been estimated only as small as 2.5% and 2.9%, for the MNIST and CIFAR-10 datasets, respectively. However, the programming time and power can be saved by 86% and 89.5% than the 100% retraining, respectively. MDPI 2019-04-13 /pmc/articles/PMC6523436/ /pubmed/31013938 http://dx.doi.org/10.3390/mi10040245 Text en © 2019 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).
spellingShingle Article
Pham, Khoa Van
Nguyen, Tien Van
Min, Kyeong-Sik
Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training
title Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training
title_full Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training
title_fullStr Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training
title_full_unstemmed Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training
title_short Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training
title_sort partial-gated memristor crossbar for fast and power-efficient defect-tolerant training
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC6523436/
https://www.ncbi.nlm.nih.gov/pubmed/31013938
http://dx.doi.org/10.3390/mi10040245
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