An Ultra-Area-Efficient 1024-Point In-Memory FFT Processor

Current computation architectures rely on more processor-centric design principles. On the other hand, the inevitable increase in the amount of data that applications need forces researchers to design novel processor architectures that are more data-centric. By following this principle, this study proposes an area-efficient Fast Fourier Transform (FFT) processor through in-memory computing. The proposed architecture occupies the smallest footprint of around 0.1 [Formula: see text] inside its class together with acceptable power efficiency. According to the results, the processor exhibits the highest area efficiency ([Formula: see text]) among the existing FFT processors in the current literature.