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A 100-Mhz Bandwidth 80-dB Dynamic Range Continuous-Time Delta-Sigma Modulator with a 2.4-Ghz Clock Rate

The bandwidth of a ΔΣ modulator is limited by the clock rate due to the oversampling ratio requirement. As the nanoscale CMOS processes are developing rapidly, it is possible to design wide bandwidth and high dynamic range continuous-time ΔΣ modulators for high-frequency applications. This paper pro...

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Detalles Bibliográficos
Autores principales: Xiao, Yao, Lu, Zhifei, Ren, Zhaofeng, Peng, Xizhu, Tang, He
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Springer US 2020
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7058773/
https://www.ncbi.nlm.nih.gov/pubmed/32140887
http://dx.doi.org/10.1186/s11671-020-3284-4
Descripción
Sumario:The bandwidth of a ΔΣ modulator is limited by the clock rate due to the oversampling ratio requirement. As the nanoscale CMOS processes are developing rapidly, it is possible to design wide bandwidth and high dynamic range continuous-time ΔΣ modulators for high-frequency applications. This paper proposes a 3rd-order 4-bit continuous-time ΔΣ modulator with a single-loop feedforward topology. This modulator is designed in a 40-nm CMOS process and achieves 80-dB dynamic range and a 100-MHz bandwidth at a clock rate of 2.4 GHz. The modulator consumes 69.7 mW from 1.2 V power supply.