Cargando…

STT-DPSA: Digital PUF-Based Secure Authentication Using STT-MRAM for the Internet of Things

Physical unclonable function (PUF), a hardware-efficient approach, has drawn a lot of attention in the security research community for exploiting the inevitable manufacturing variability of integrated circuits (IC) as the unique fingerprint of each IC. However, analog PUF is not robust and resistant...

Descripción completa

Detalles Bibliográficos
Autores principales: Chien, Wei-Chen, Chang, Yu-Chian, Tsou, Yao-Tung, Kuo, Sy-Yen, Chang, Ching-Ray
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2020
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7281492/
https://www.ncbi.nlm.nih.gov/pubmed/32429169
http://dx.doi.org/10.3390/mi11050502
_version_ 1783543932769009664
author Chien, Wei-Chen
Chang, Yu-Chian
Tsou, Yao-Tung
Kuo, Sy-Yen
Chang, Ching-Ray
author_facet Chien, Wei-Chen
Chang, Yu-Chian
Tsou, Yao-Tung
Kuo, Sy-Yen
Chang, Ching-Ray
author_sort Chien, Wei-Chen
collection PubMed
description Physical unclonable function (PUF), a hardware-efficient approach, has drawn a lot of attention in the security research community for exploiting the inevitable manufacturing variability of integrated circuits (IC) as the unique fingerprint of each IC. However, analog PUF is not robust and resistant to environmental conditions. In this paper, we propose a digital PUF-based secure authentication model using the emergent spin-transfer torque magnetic random-access memory (STT-MRAM) PUF (called STT-DPSA for short). STT-DPSA is an original secure identity authentication architecture for Internet of Things (IoT) devices to devise a computationally lightweight authentication architecture which is not susceptible to environmental conditions. Considering hardware security level or cell area, we alternatively build matrix multiplication or stochastic logic operation for our authentication model. To prove the feasibility of our model, the reliability of our PUF is validated via the working windows between temperature interval (−35 [Formula: see text] C, 110 [Formula: see text] C) and Vdd interval [0.95 V, 1.16 V] and STT-DPSA is implemented with parameters n = 32, i = o = 1024, k = 8, and l = 2 using FPGA design flow. Under this setting of parameters, an attacker needs to take time complexity O([Formula: see text]) to compromise STT-DPSA. We also evaluate STT-DPSA using Synopsys design compiler with TSMC 0.18 um process.
format Online
Article
Text
id pubmed-7281492
institution National Center for Biotechnology Information
language English
publishDate 2020
publisher MDPI
record_format MEDLINE/PubMed
spelling pubmed-72814922020-06-17 STT-DPSA: Digital PUF-Based Secure Authentication Using STT-MRAM for the Internet of Things Chien, Wei-Chen Chang, Yu-Chian Tsou, Yao-Tung Kuo, Sy-Yen Chang, Ching-Ray Micromachines (Basel) Article Physical unclonable function (PUF), a hardware-efficient approach, has drawn a lot of attention in the security research community for exploiting the inevitable manufacturing variability of integrated circuits (IC) as the unique fingerprint of each IC. However, analog PUF is not robust and resistant to environmental conditions. In this paper, we propose a digital PUF-based secure authentication model using the emergent spin-transfer torque magnetic random-access memory (STT-MRAM) PUF (called STT-DPSA for short). STT-DPSA is an original secure identity authentication architecture for Internet of Things (IoT) devices to devise a computationally lightweight authentication architecture which is not susceptible to environmental conditions. Considering hardware security level or cell area, we alternatively build matrix multiplication or stochastic logic operation for our authentication model. To prove the feasibility of our model, the reliability of our PUF is validated via the working windows between temperature interval (−35 [Formula: see text] C, 110 [Formula: see text] C) and Vdd interval [0.95 V, 1.16 V] and STT-DPSA is implemented with parameters n = 32, i = o = 1024, k = 8, and l = 2 using FPGA design flow. Under this setting of parameters, an attacker needs to take time complexity O([Formula: see text]) to compromise STT-DPSA. We also evaluate STT-DPSA using Synopsys design compiler with TSMC 0.18 um process. MDPI 2020-05-15 /pmc/articles/PMC7281492/ /pubmed/32429169 http://dx.doi.org/10.3390/mi11050502 Text en © 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).
spellingShingle Article
Chien, Wei-Chen
Chang, Yu-Chian
Tsou, Yao-Tung
Kuo, Sy-Yen
Chang, Ching-Ray
STT-DPSA: Digital PUF-Based Secure Authentication Using STT-MRAM for the Internet of Things
title STT-DPSA: Digital PUF-Based Secure Authentication Using STT-MRAM for the Internet of Things
title_full STT-DPSA: Digital PUF-Based Secure Authentication Using STT-MRAM for the Internet of Things
title_fullStr STT-DPSA: Digital PUF-Based Secure Authentication Using STT-MRAM for the Internet of Things
title_full_unstemmed STT-DPSA: Digital PUF-Based Secure Authentication Using STT-MRAM for the Internet of Things
title_short STT-DPSA: Digital PUF-Based Secure Authentication Using STT-MRAM for the Internet of Things
title_sort stt-dpsa: digital puf-based secure authentication using stt-mram for the internet of things
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7281492/
https://www.ncbi.nlm.nih.gov/pubmed/32429169
http://dx.doi.org/10.3390/mi11050502
work_keys_str_mv AT chienweichen sttdpsadigitalpufbasedsecureauthenticationusingsttmramfortheinternetofthings
AT changyuchian sttdpsadigitalpufbasedsecureauthenticationusingsttmramfortheinternetofthings
AT tsouyaotung sttdpsadigitalpufbasedsecureauthenticationusingsttmramfortheinternetofthings
AT kuosyyen sttdpsadigitalpufbasedsecureauthenticationusingsttmramfortheinternetofthings
AT changchingray sttdpsadigitalpufbasedsecureauthenticationusingsttmramfortheinternetofthings