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Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA

This work presents how to implement the Matrix-Vector Multiplication (MVM) onto FPGA through the QuickPlay High-Level Synthesis flow. The motivations arise from the Adaptive Optics field, where the MVM is the core of the real-time control algorithm which controls the mirrors of a telescope to compen...

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Autores principales: Marongiu, Alessandro, Palazzari, Paolo
Formato: Online Artículo Texto
Lenguaje:English
Publicado: 2020
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7295354/
http://dx.doi.org/10.1007/978-3-030-50743-5_13
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author Marongiu, Alessandro
Palazzari, Paolo
author_facet Marongiu, Alessandro
Palazzari, Paolo
author_sort Marongiu, Alessandro
collection PubMed
description This work presents how to implement the Matrix-Vector Multiplication (MVM) onto FPGA through the QuickPlay High-Level Synthesis flow. The motivations arise from the Adaptive Optics field, where the MVM is the core of the real-time control algorithm which controls the mirrors of a telescope to compensate for the effects of the atmospheric turbulence. The proposed implementation of the MVM exploits four different levels of parallelism: spatial and pipeline parallelism are used both at the fine (scalar instructions) and at the coarse (vector instructions) levels. To characterize the architecture being developed, a performance model has been developed and validated through the actual results obtained from runs on a prototype board based on the Intel ARRIA10 FPGA. Some details are given to describe how the algorithm has been implemented using the QuickPlay HLS flow. Performance results are presented, in terms of sustained computational speed and resources used in the hardware implementation.
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spelling pubmed-72953542020-06-16 Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA Marongiu, Alessandro Palazzari, Paolo High Performance Computing Article This work presents how to implement the Matrix-Vector Multiplication (MVM) onto FPGA through the QuickPlay High-Level Synthesis flow. The motivations arise from the Adaptive Optics field, where the MVM is the core of the real-time control algorithm which controls the mirrors of a telescope to compensate for the effects of the atmospheric turbulence. The proposed implementation of the MVM exploits four different levels of parallelism: spatial and pipeline parallelism are used both at the fine (scalar instructions) and at the coarse (vector instructions) levels. To characterize the architecture being developed, a performance model has been developed and validated through the actual results obtained from runs on a prototype board based on the Intel ARRIA10 FPGA. Some details are given to describe how the algorithm has been implemented using the QuickPlay HLS flow. Performance results are presented, in terms of sustained computational speed and resources used in the hardware implementation. 2020-05-22 /pmc/articles/PMC7295354/ http://dx.doi.org/10.1007/978-3-030-50743-5_13 Text en © Springer Nature Switzerland AG 2020 This article is made available via the PMC Open Access Subset for unrestricted research re-use and secondary analysis in any form or by any means with acknowledgement of the original source. These permissions are granted for the duration of the World Health Organization (WHO) declaration of COVID-19 as a global pandemic.
spellingShingle Article
Marongiu, Alessandro
Palazzari, Paolo
Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA
title Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA
title_full Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA
title_fullStr Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA
title_full_unstemmed Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA
title_short Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA
title_sort using high-level synthesis to implement the matrix-vector multiplication on fpga
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7295354/
http://dx.doi.org/10.1007/978-3-030-50743-5_13
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