A Logic‐Memory Transistor with the Integration of Visible Information Sensing‐Memory‐Processing

To meet the demands of future intelligent application scenarios, the time‐efficient information acquisition and energy‐efficient data processing capabilities of terminal electronic systems are indispensable. However, in current commercial visual systems, the visible information is collected by image sensors, converted into digital format data, and transferred to memory units and processors for subsequent processing tasks. As a result, most of the time and energy are wasted in the data conversion and movement, which leads to large time latency and low energy efficiency. Here, based on 2D semiconductor WSe(2), a logic‐memory transistor that integrates visible information sensing‐memory‐processing capabilities is successfully demonstrated. Furthermore, based on 3 × 3 fabricated devices, an artificial visible information sensing‐memory‐processing system is proposed to perform image distinction tasks, in which the time latency and energy consumption caused by data conversion and movement can be avoided. On the other hand, the logic‐memory transistor can also execute digital logic processing (logic) and logic results storage (memory) at the same time, such as AND logic function. Such a logic‐memory transistor could provide a compact approach to develop next‐generation efficient visual systems.