High-Performance Top-Gate Thin-Film Transistor with an Ultra-Thin Channel Layer

Metal-oxide thin-film transistors (TFTs) have been implanted for a display panel, but further mobility improvement is required for future applications. In this study, excellent performance was observed for top-gate coplanar binary SnO(2) TFTs, with a high field-effect mobility (μ(FE)) of 136 cm(2)/Vs, a large on-current/off-current (I(ON)/I(OFF)) of 1.5 × 10(8), and steep subthreshold slopes of 108 mV/dec. Here, μ(FE) represents the maximum among the top-gate TFTs made on an amorphous SiO(2) substrate, with a maximum process temperature of ≤ 400 °C. In contrast to a bottom-gate device, a top-gate device is the standard structure for monolithic integrated circuits (ICs). Such a superb device integrity was achieved by using an ultra-thin SnO(2) channel layer of 4.5 nm and an HfO(2) gate dielectric with a 3 nm SiO(2) interfacial layer between the SnO(2) and HfO(2). The inserted SiO(2) layer is crucial for decreasing the charged defect scattering in the HfO(2) and HfO(2)/SnO(2) interfaces to increase the mobility. Such high μ(FE), large I(ON), and low I(OFF) top-gate SnO(2) devices with a coplanar structure are important for display, dynamic random-access memory, and monolithic three-dimensional ICs.