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A Tunable-Gain Transimpedance Amplifier for CMOS-MEMS Resonators Characterization

CMOS-MEMS resonators have become a promising solution thanks to their miniaturization and on-chip integration capabilities. However, using a CMOS technology to fabricate microelectromechanical system (MEMS) devices limits the electromechanical performance otherwise achieved by specific technologies,...

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Detalles Bibliográficos
Autores principales: Perelló-Roig, Rafel, Verd, Jaume, Bota, Sebastià, Segura, Jaume
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2021
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7830080/
https://www.ncbi.nlm.nih.gov/pubmed/33467477
http://dx.doi.org/10.3390/mi12010082
Descripción
Sumario:CMOS-MEMS resonators have become a promising solution thanks to their miniaturization and on-chip integration capabilities. However, using a CMOS technology to fabricate microelectromechanical system (MEMS) devices limits the electromechanical performance otherwise achieved by specific technologies, requiring a challenging readout circuitry. This paper presents a transimpedance amplifier (TIA) fabricated using a commercial 0.35-µm CMOS technology specifically oriented to drive and sense monolithically integrated CMOS-MEMS resonators up to 50 MHz with a tunable transimpedance gain ranging from 112 dB to 121 dB. The output voltage noise is as low as 225 nV/Hz(1/2)—input-referred current noise of 192 fA/Hz(1/2)—at 10 MHz, and the power consumption is kept below 1-mW. In addition, the TIA amplifier exhibits an open-loop gain independent of the parasitic input capacitance—mostly associated with the MEMS layout—representing an advantage in MEMS testing compared to other alternatives such as Pierce oscillator schemes. The work presented includes the characterization of three types of MEMS resonators that have been fabricated and experimentally characterized both in open-loop and self-sustained configurations using the integrated TIA amplifier. The experimental characterization includes an accurate extraction of the electromechanical parameters for the three fabricated structures that enables an accurate MEMS-CMOS circuitry co-design.