The Impact of Process Conditions on Surge Current Capability of 1.2 kV SiC JBS and MPS Diodes

This paper demonstrated the impact of process conditions on the surge current capability of 1.2 kV SiC junction barrier Schottky diode (JBS) and merged PiN Schottky diode (MPS). The influence of ohmic contact and defect density produced by implantation was studied in the simulation. The device fabricated with high temperature implantation had less defect density in the implant region compared with room temperature implantation, which contributed to higher hole injection in surge current mode and 20% surge capability improvement. In addition, with lower P+ ohmic contact resistance, the device had higher surge capability. When compared to device fabrication with a single Schottky metal layer in the device active area, adding additional P+ ohmic contact on top of the P+ regions in the device active area resulted in the pn junctions sharing a greater portion of surge current, and improved the devices’ surge capability by ~10%.