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High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA
In this paper, we present a high-speed, unified elliptic curve cryptography (ECC) processor for arbitrary Weierstrass curves over [Formula: see text] , which to the best of our knowledge, outperforms other similar works in terms of execution time. Our approach employs the combination of the schoolbo...
Autores principales: | , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2021
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7922882/ https://www.ncbi.nlm.nih.gov/pubmed/33669681 http://dx.doi.org/10.3390/s21041451 |
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author | Awaludin, Asep Muhamad Larasati, Harashta Tatimma Kim, Howon |
author_facet | Awaludin, Asep Muhamad Larasati, Harashta Tatimma Kim, Howon |
author_sort | Awaludin, Asep Muhamad |
collection | PubMed |
description | In this paper, we present a high-speed, unified elliptic curve cryptography (ECC) processor for arbitrary Weierstrass curves over [Formula: see text] , which to the best of our knowledge, outperforms other similar works in terms of execution time. Our approach employs the combination of the schoolbook long and Karatsuba multiplication algorithm for the elliptic curve point multiplication (ECPM) to achieve better parallelization while retaining low complexity. In the hardware implementation, the substantial gain in speed is also contributed by our n-bit pipelined Montgomery Modular Multiplier (pMMM), which is constructed from our n-bit pipelined multiplier-accumulators that utilizes digital signal processor (DSP) primitives as digit multipliers. Additionally, we also introduce our unified, pipelined modular adder/subtractor (pMAS) for the underlying field arithmetic, and leverage a more efficient yet compact scheduling of the Montgomery ladder algorithm. The implementation for 256-bit modulus size on the 7-series FPGA: Virtex-7, Kintex-7, and XC7Z020 yields 0.139, 0.138, and 0.206 ms of execution time, respectively. Furthermore, since our pMMM module is generic for any curve in Weierstrass form, we support multi-curve parameters, resulting in a unified ECC architecture. Lastly, our method also works in constant time, making it suitable for applications requiring high speed and SCA-resistant characteristics. |
format | Online Article Text |
id | pubmed-7922882 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2021 |
publisher | MDPI |
record_format | MEDLINE/PubMed |
spelling | pubmed-79228822021-03-03 High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA Awaludin, Asep Muhamad Larasati, Harashta Tatimma Kim, Howon Sensors (Basel) Article In this paper, we present a high-speed, unified elliptic curve cryptography (ECC) processor for arbitrary Weierstrass curves over [Formula: see text] , which to the best of our knowledge, outperforms other similar works in terms of execution time. Our approach employs the combination of the schoolbook long and Karatsuba multiplication algorithm for the elliptic curve point multiplication (ECPM) to achieve better parallelization while retaining low complexity. In the hardware implementation, the substantial gain in speed is also contributed by our n-bit pipelined Montgomery Modular Multiplier (pMMM), which is constructed from our n-bit pipelined multiplier-accumulators that utilizes digital signal processor (DSP) primitives as digit multipliers. Additionally, we also introduce our unified, pipelined modular adder/subtractor (pMAS) for the underlying field arithmetic, and leverage a more efficient yet compact scheduling of the Montgomery ladder algorithm. The implementation for 256-bit modulus size on the 7-series FPGA: Virtex-7, Kintex-7, and XC7Z020 yields 0.139, 0.138, and 0.206 ms of execution time, respectively. Furthermore, since our pMMM module is generic for any curve in Weierstrass form, we support multi-curve parameters, resulting in a unified ECC architecture. Lastly, our method also works in constant time, making it suitable for applications requiring high speed and SCA-resistant characteristics. MDPI 2021-02-19 /pmc/articles/PMC7922882/ /pubmed/33669681 http://dx.doi.org/10.3390/s21041451 Text en © 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/). |
spellingShingle | Article Awaludin, Asep Muhamad Larasati, Harashta Tatimma Kim, Howon High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA |
title | High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA |
title_full | High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA |
title_fullStr | High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA |
title_full_unstemmed | High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA |
title_short | High-Speed and Unified ECC Processor for Generic Weierstrass Curves over GF(p) on FPGA |
title_sort | high-speed and unified ecc processor for generic weierstrass curves over gf(p) on fpga |
topic | Article |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7922882/ https://www.ncbi.nlm.nih.gov/pubmed/33669681 http://dx.doi.org/10.3390/s21041451 |
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