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Study of a Gate-Engineered Vertical TFET with GaSb/GaAs(0.5)Sb(0.5) Heterojunction

It is well known that the vertical tunnel field effect transistor (TFET) is easier to fabricate than the conventional lateral TFETs in technology. Meanwhile, a lightly doped pocket under the source region can improve the subthreshold performance of the vertical TFETs. This paper demonstrates a dual...

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Detalles Bibliográficos
Autores principales: Xie, Haiwu, Chen, Yanning, Liu, Hongxia, Guo, Dan
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2021
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7998445/
https://www.ncbi.nlm.nih.gov/pubmed/33804142
http://dx.doi.org/10.3390/ma14061426
Descripción
Sumario:It is well known that the vertical tunnel field effect transistor (TFET) is easier to fabricate than the conventional lateral TFETs in technology. Meanwhile, a lightly doped pocket under the source region can improve the subthreshold performance of the vertical TFETs. This paper demonstrates a dual material gate heterogeneous dielectric vertical TFET (DMG-HD-VTFET) with a lightly doped source-pocket. The proposed structure adopts a GaSb/GaAs(0.5)Sb(0.5) heterojunction at the source and pocket to improve the band-to-band tunneling (BTBT) rate; at the same time, the gate electrode is divided into two parts, namely a tunnel gate (M1) and control gate (M2) with work functions Φ(M1) and Φ(M2), where Φ(M1) > Φ(M2). In addition, further performance enhancement in the proposed device is realized by a heterogeneous dielectric corresponding to a dual material gate. Simulation results indicate that DMG-HD-VTFET and HD-VTFET possess superior metrics in terms of DC (Direct Current) and RF (Radio Frequency) performance as compared with conventional VTFET. As a result, the ON-state current of 2.92 × 10(−4) A/μm, transconductance of 6.46 × 10(−4) S/μm, and average subthreshold swing (SS(ave)) of 18.1 mV/Dec at low drain voltage can be obtained. At the same time, DMG-HD-VTFET could achieve a maximum f(T) of 459 GHz at 0.72 V gate-to-source voltage (V(gs)) and a maximum gain bandwidth (GBW) of 35 GHz at V(gs) = 0.6 V, respectively. So, the proposed structure will have a great potential to boost the device performance of traditional vertical TFETs.