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A Low-Power Spiking Neural Network Chip Based on a Compact LIF Neuron and Binary Exponential Charge Injector Synapse Circuits
To realize a large-scale Spiking Neural Network (SNN) on hardware for mobile applications, area and power optimized electronic circuit design is critical. In this work, an area and power optimized hardware implementation of a large-scale SNN for real time IoT applications is presented. The analog Co...
| Autores principales: | , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
MDPI
2021
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8272117/ https://www.ncbi.nlm.nih.gov/pubmed/34210045 http://dx.doi.org/10.3390/s21134462 |