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Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing †

Convolution operations have a significant influence on the overall performance of a convolutional neural network, especially in edge-computing hardware design. In this paper, we propose a low-power signed convolver hardware architecture that is well suited for low-power edge computing. The basic ide...

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Autores principales: Kao, Hsu-Yu, Chen, Xin-Jia, Huang, Shih-Hsu
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2021
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8348912/
https://www.ncbi.nlm.nih.gov/pubmed/34372318
http://dx.doi.org/10.3390/s21155081
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author Kao, Hsu-Yu
Chen, Xin-Jia
Huang, Shih-Hsu
author_facet Kao, Hsu-Yu
Chen, Xin-Jia
Huang, Shih-Hsu
author_sort Kao, Hsu-Yu
collection PubMed
description Convolution operations have a significant influence on the overall performance of a convolutional neural network, especially in edge-computing hardware design. In this paper, we propose a low-power signed convolver hardware architecture that is well suited for low-power edge computing. The basic idea of the proposed convolver design is to combine all multipliers’ final additions and their corresponding adder tree to form a partial product matrix (PPM) and then to use the reduction tree algorithm to reduce this PPM. As a result, compared with the state-of-the-art approach, our convolver design not only saves a lot of carry propagation adders but also saves one clock cycle per convolution operation. Moreover, the proposed convolver design can be adapted for different dataflows (including input stationary dataflow, weight stationary dataflow, and output stationary dataflow). According to dataflows, two types of convolve-accumulate units are proposed to perform the accumulation of convolution results. The results show that, compared with the state-of-the-art approach, the proposed convolver design can save 15.6% power consumption. Furthermore, compared with the state-of-the-art approach, on average, the proposed convolve-accumulate units can reduce 15.7% power consumption.
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spelling pubmed-83489122021-08-08 Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing † Kao, Hsu-Yu Chen, Xin-Jia Huang, Shih-Hsu Sensors (Basel) Article Convolution operations have a significant influence on the overall performance of a convolutional neural network, especially in edge-computing hardware design. In this paper, we propose a low-power signed convolver hardware architecture that is well suited for low-power edge computing. The basic idea of the proposed convolver design is to combine all multipliers’ final additions and their corresponding adder tree to form a partial product matrix (PPM) and then to use the reduction tree algorithm to reduce this PPM. As a result, compared with the state-of-the-art approach, our convolver design not only saves a lot of carry propagation adders but also saves one clock cycle per convolution operation. Moreover, the proposed convolver design can be adapted for different dataflows (including input stationary dataflow, weight stationary dataflow, and output stationary dataflow). According to dataflows, two types of convolve-accumulate units are proposed to perform the accumulation of convolution results. The results show that, compared with the state-of-the-art approach, the proposed convolver design can save 15.6% power consumption. Furthermore, compared with the state-of-the-art approach, on average, the proposed convolve-accumulate units can reduce 15.7% power consumption. MDPI 2021-07-27 /pmc/articles/PMC8348912/ /pubmed/34372318 http://dx.doi.org/10.3390/s21155081 Text en © 2021 by the authors. https://creativecommons.org/licenses/by/4.0/Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
spellingShingle Article
Kao, Hsu-Yu
Chen, Xin-Jia
Huang, Shih-Hsu
Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing †
title Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing †
title_full Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing †
title_fullStr Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing †
title_full_unstemmed Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing †
title_short Convolver Design and Convolve-Accumulate Unit Design for Low-Power Edge Computing †
title_sort convolver design and convolve-accumulate unit design for low-power edge computing †
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8348912/
https://www.ncbi.nlm.nih.gov/pubmed/34372318
http://dx.doi.org/10.3390/s21155081
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