Cargando…

Author Correction: Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs

Detalles Bibliográficos
Autores principales:	Han, Seong‑Joo, Han, Joon‑Kyu, Kim, Myung‑Su, Yun, Gyeong‑Jun, Yu, Ji‑Man, Tcho, Il‑Woong, Seo, Myungsoo, Lee, Geon‑Beom, Choi, Yang‑Kyu
Formato:	Online Artículo Texto
Lenguaje:	English
Publicado:	Nature Publishing Group UK 2021
Materias:	Author Correction
Acceso en línea:	https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8377029/ https://www.ncbi.nlm.nih.gov/pubmed/34413431 http://dx.doi.org/10.1038/s41598-021-96555-6

Ejemplares similares

Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
por: Han, Seong-Joo, et al.
Publicado: (2021)

Radiation Response of Negative Gate Biased SiC MOSFETs
por: Takeyama, Akinori, et al.
Publicado: (2019)

SiC Fin-Shaped Gate Trench MOSFET with Integrated Schottky Diode
por: Deng, Xiaochuan, et al.
Publicado: (2021)

a-Si:H/SiNW shell/core for SiNW solar cell applications
por: Ashour, Eman Sad, et al.
Publicado: (2013)

Author Correction: A shuttling-based two-qubit logic gate for linking distant silicon quantum processors
por: Noiri, Akito, et al.
Publicado: (2022)

Heterogeneous CMOS Integration of InGaAs-OI nMOSFETs and Ge pMOSFETs Based on Dual-Gate Oxide Technique
por: Tang, Xiaoyu, et al.
Publicado: (2022)

SiC Heterojunction Trench MOSFET with a Buried P-Type Pillar for the Low Gate-Drain Charge and Switching Loss
por: Ran, Shenglong, et al.
Publicado: (2022)

Use of Bilayer Gate Insulator in GaN-on-Si Vertical Trench MOSFETs: Impact on Performance and Reliability
por: Mukherjee, Kalparupa, et al.
Publicado: (2020)

4H-SiC Double Trench MOSFET with Split Heterojunction Gate for Improving Switching Characteristics
por: Na, Jaeyeop, et al.
Publicado: (2021)

Cells function as a ternary logic gate to decide migration direction under integrated chemical and fluidic cues
por: Moon, Hye-ran, et al.
Publicado: (2022)

The Microscopic Mechanisms of Nonlinear Rectification on Si-MOSFETs Terahertz Detector
por: Wei, Yingdong, et al.
Publicado: (2023)

High frequency MOSFET gate drivers: technologies and applications
por: Zhang, Zhiliang, et al.
Publicado: (2017)

Strained MOSFETs on ordered SiGe dots
por: Cervenka, Johann, et al.
Publicado: (2011)

The Influence of Special Environments on SiC MOSFETs
por: Li, Zhigang, et al.
Publicado: (2023)

Electrical Characteristics of the Uniaxial-Strained nMOSFET with a Fluorinated HfO(2)/SiON Gate Stack
por: Chen, Yung-Yu
Publicado: (2014)

Influence of Different Device Structures on the Degradation for Trench-Gate SiC MOSFETs: Taking Avalanche Stress as an Example
por: Wei, Zhaoxiang, et al.
Publicado: (2022)

Control of the Alumina Microstructure to Reduce Gate Leaks in Diamond MOSFETs
por: Gutiérrez, Marina, et al.
Publicado: (2018)

Author Correction: Transcriptomic and cellular decoding of regional brain vulnerability to neurogenetic disorders
por: Seidlitz, Jakob, et al.
Publicado: (2020)

Author Correction: Decoding accelerometry for classification and prediction of critically ill patients with severe brain injury
por: Bhattacharyay, Shubhayu, et al.
Publicado: (2022)

Fabrication and Characteristics of an nc-Si/c-Si Heterojunction MOSFETs Pressure Sensor
por: Zhao, Xiaofeng, et al.
Publicado: (2012)

Analysis for DC and RF Characteristics Recessed-Gate GaN MOSFET Using Stacked TiO(2)/Si(3)N(4) Dual-Layer Insulator
por: Min, So-Ra, et al.
Publicado: (2022)

Performance of arsenene and antimonene double-gate MOSFETs from first principles
por: Pizzi, Giovanni, et al.
Publicado: (2016)

Improved Dielectrically Modulated Quad Gate Schottky Barrier MOSFET Biosensor
por: Esakki, Papanasam, et al.
Publicado: (2023)

Analog performance of SOI MOSFETs up to 25 Mrad (Si)
por: Faccio, F, et al.
Publicado: (1995)

Investigation of 1200 V SiC MOSFETs’ Surge Reliability
por: Li, Huan, et al.
Publicado: (2019)

High mobility Ge pMOSFETs with amorphous Si passivation: impact of surface orientation
por: Liu, Huan, et al.
Publicado: (2019)

Vertically stacked, low-voltage organic ternary logic circuits including nonvolatile floating-gate memory transistors
por: Choi, Junhwan, et al.
Publicado: (2022)

A reconfigurable binary/ternary logic conversion-in-memory based on drain-aligned floating-gate heterojunction transistors
por: Lee, Chungryeol, et al.
Publicado: (2023)

Ge/Si multilayer epitaxy and removal of dislocations from Ge-nanosheet-channel MOSFETs
por: Chu, Chun-Lin, et al.
Publicado: (2022)

Author Correction: Synthetic RNA-based logic computation in mammalian cells
por: Matsuura, Satoshi, et al.
Publicado: (2019)

Effects of JFET Region Design and Gate Oxide Thickness on the Static and Dynamic Performance of 650 V SiC Planar Power MOSFETs
por: Zhu, Shengnan, et al.
Publicado: (2022)

Author Correction: EEG Decoding Reveals the Strength and Temporal Dynamics of Goal-Relevant Representations
por: Hubbard, Jason, et al.
Publicado: (2020)

Marx Generator Prototype for Kicker Magnets Based on SiC MOSFETs
por: Redondo, L M, et al.
Publicado: (2018)

Current Transport Mechanism for Heavy-Ion Degraded SiC MOSFETs
por: Martinella, C, et al.
Publicado: (2019)

Impact of Terrestrial Neutrons on the Reliability of SiC VD-MOSFET Technologies
por: Martinella, C, et al.
Publicado: (2021)

Investigation of the Degradation Mechanism of SiC MOSFET Subjected to Multiple Stresses
por: Dong, Huifen, et al.
Publicado: (2023)

Author Correction: Is negative capacitance FET a steep-slope logic switch?
por: Cao, Wei, et al.
Publicado: (2020)

Design of a Capacitorless DRAM Based on a Polycrystalline-Silicon Dual-Gate MOSFET with a Fin-Shaped Structure
por: An, Hee Dae, et al.
Publicado: (2022)

Author Correction: Lattice strain-enhanced exsolution of nanoparticles in thin films
por: Han, Hyeon, et al.
Publicado: (2019)

Author Correction: Process optimization for biosynthesis of mono and bimetallic alloy nanoparticle catalysts for degradation of dyes in individual and ternary mixture
por: Ghosh, Sabyasachi, et al.
Publicado: (2020)

Cannot write session to /tmp/vufind_sessions/sess_lcvobug030mlebuukcqa63hm5g