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Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration
GaN HEMT has attracted a lot of attention in recent years owing to its wide applications from the high-frequency power amplifier to the high voltage devices used in power electronic systems. Development of GaN HEMT on Si-based substrate is currently the main focus of the industry to reduce the cost...
Autores principales: | , , , , , , , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2021
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8541231/ https://www.ncbi.nlm.nih.gov/pubmed/34683210 http://dx.doi.org/10.3390/mi12101159 |
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author | Hsu, Lung-Hsing Lai, Yung-Yu Tu, Po-Tsung Langpoklakpam, Catherine Chang, Ya-Ting Huang, Yu-Wen Lee, Wen-Chung Tzou, An-Jye Cheng, Yuh-Jen Lin, Chun-Hsiung Kuo, Hao-Chung Chang, Edward Yi |
author_facet | Hsu, Lung-Hsing Lai, Yung-Yu Tu, Po-Tsung Langpoklakpam, Catherine Chang, Ya-Ting Huang, Yu-Wen Lee, Wen-Chung Tzou, An-Jye Cheng, Yuh-Jen Lin, Chun-Hsiung Kuo, Hao-Chung Chang, Edward Yi |
author_sort | Hsu, Lung-Hsing |
collection | PubMed |
description | GaN HEMT has attracted a lot of attention in recent years owing to its wide applications from the high-frequency power amplifier to the high voltage devices used in power electronic systems. Development of GaN HEMT on Si-based substrate is currently the main focus of the industry to reduce the cost as well as to integrate GaN with Si-based components. However, the direct growth of GaN on Si has the challenge of high defect density that compromises the performance, reliability, and yield. Defects are typically nucleated at the GaN/Si heterointerface due to both lattice and thermal mismatches between GaN and Si. In this article, we will review the current status of GaN on Si in terms of epitaxy and device performances in high frequency and high-power applications. Recently, different substrate structures including silicon-on-insulator (SOI) and engineered poly-AlN (QST(®)) are introduced to enhance the epitaxy quality by reducing the mismatches. We will discuss the development and potential benefit of these novel substrates. Moreover, SOI may provide a path to enable the integration of GaN with Si CMOS. Finally, the recent development of 3D hetero-integration technology to combine GaN technology and CMOS is also illustrated. |
format | Online Article Text |
id | pubmed-8541231 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2021 |
publisher | MDPI |
record_format | MEDLINE/PubMed |
spelling | pubmed-85412312021-10-24 Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration Hsu, Lung-Hsing Lai, Yung-Yu Tu, Po-Tsung Langpoklakpam, Catherine Chang, Ya-Ting Huang, Yu-Wen Lee, Wen-Chung Tzou, An-Jye Cheng, Yuh-Jen Lin, Chun-Hsiung Kuo, Hao-Chung Chang, Edward Yi Micromachines (Basel) Review GaN HEMT has attracted a lot of attention in recent years owing to its wide applications from the high-frequency power amplifier to the high voltage devices used in power electronic systems. Development of GaN HEMT on Si-based substrate is currently the main focus of the industry to reduce the cost as well as to integrate GaN with Si-based components. However, the direct growth of GaN on Si has the challenge of high defect density that compromises the performance, reliability, and yield. Defects are typically nucleated at the GaN/Si heterointerface due to both lattice and thermal mismatches between GaN and Si. In this article, we will review the current status of GaN on Si in terms of epitaxy and device performances in high frequency and high-power applications. Recently, different substrate structures including silicon-on-insulator (SOI) and engineered poly-AlN (QST(®)) are introduced to enhance the epitaxy quality by reducing the mismatches. We will discuss the development and potential benefit of these novel substrates. Moreover, SOI may provide a path to enable the integration of GaN with Si CMOS. Finally, the recent development of 3D hetero-integration technology to combine GaN technology and CMOS is also illustrated. MDPI 2021-09-27 /pmc/articles/PMC8541231/ /pubmed/34683210 http://dx.doi.org/10.3390/mi12101159 Text en © 2021 by the authors. https://creativecommons.org/licenses/by/4.0/Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/). |
spellingShingle | Review Hsu, Lung-Hsing Lai, Yung-Yu Tu, Po-Tsung Langpoklakpam, Catherine Chang, Ya-Ting Huang, Yu-Wen Lee, Wen-Chung Tzou, An-Jye Cheng, Yuh-Jen Lin, Chun-Hsiung Kuo, Hao-Chung Chang, Edward Yi Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration |
title | Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration |
title_full | Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration |
title_fullStr | Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration |
title_full_unstemmed | Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration |
title_short | Development of GaN HEMTs Fabricated on Silicon, Silicon-on-Insulator, and Engineered Substrates and the Heterogeneous Integration |
title_sort | development of gan hemts fabricated on silicon, silicon-on-insulator, and engineered substrates and the heterogeneous integration |
topic | Review |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8541231/ https://www.ncbi.nlm.nih.gov/pubmed/34683210 http://dx.doi.org/10.3390/mi12101159 |
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