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1.3 kV Vertical GaN-Based Trench MOSFETs on 4-Inch Free Standing GaN Wafer

In this work, a vertical gallium nitride (GaN)-based trench MOSFET on 4-inch free-standing GaN substrate is presented with threshold voltage of 3.15 V, specific on-resistance of 1.93 mΩ·cm(2), breakdown voltage of 1306 V, and figure of merit of 0.88 GW/cm(2). High-quality and stable MOS interface is...

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Detalles Bibliográficos
Autores principales: He, Wei, Li, Jian, Liao, Zeliang, Lin, Feng, Wu, Junye, Wang, Bing, Wang, Maojun, Liu, Nan, Chiu, Hsien-Chin, Kuo, Hao-Chung, Lin, Xinnan, Li, Jingbo, Liu, Xinke
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Springer US 2022
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8761181/
https://www.ncbi.nlm.nih.gov/pubmed/35032235
http://dx.doi.org/10.1186/s11671-022-03653-z
Descripción
Sumario:In this work, a vertical gallium nitride (GaN)-based trench MOSFET on 4-inch free-standing GaN substrate is presented with threshold voltage of 3.15 V, specific on-resistance of 1.93 mΩ·cm(2), breakdown voltage of 1306 V, and figure of merit of 0.88 GW/cm(2). High-quality and stable MOS interface is obtained through two-step process, including simple acid cleaning and a following (NH(4))(2)S passivation. Based on the calibration with experiment, the simulation results of physical model are consistent well with the experiment data in transfer, output, and breakdown characteristic curves, which demonstrate the validity of the simulation data obtained by Silvaco technology computer aided design (Silvaco TCAD). The mechanisms of on-state and breakdown are thoroughly studied using Silvaco TCAD physical model. The device parameters, including n(−)-GaN drift layer, p-GaN channel layer and gate dielectric layer, are systematically designed for optimization. This comprehensive analysis and optimization on the vertical GaN-based trench MOSFETs provide significant guide for vertical GaN-based high power applications.