Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device

TiN/AlO(x):Ti/TaO(x)/TiN memory devices using bilayer resistive switching memory demonstrated excellent durability and capability of QLC (quad-level cell) memory devices. The best nonvolatile memory characteristics with the lowest operation current and optimized 4 bit/cell states were obtained using...

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Detalles Bibliográficos
Autores principales: Shin, Hee Ju, Seo, Hyun Kyu, Lee, Su Yeon, Park, Minsoo, Park, Seong-Geon, Yang, Min Kyu
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8999717/
https://www.ncbi.nlm.nih.gov/pubmed/35407734
http://dx.doi.org/10.3390/ma15072402
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author Shin, Hee Ju
Seo, Hyun Kyu
Lee, Su Yeon
Park, Minsoo
Park, Seong-Geon
Yang, Min Kyu
author_facet Shin, Hee Ju
Seo, Hyun Kyu
Lee, Su Yeon
Park, Minsoo
Park, Seong-Geon
Yang, Min Kyu
author_sort Shin, Hee Ju
collection PubMed
description TiN/AlO(x):Ti/TaO(x)/TiN memory devices using bilayer resistive switching memory demonstrated excellent durability and capability of QLC (quad-level cell) memory devices. The best nonvolatile memory characteristics with the lowest operation current and optimized 4 bit/cell states were obtained using the Incremental Step Pulse Programming (ISPP) algorithm in array. As a result, a superior QLC reliability (cycle endurance > 1 k at each level of the QLC, data retention > 2 h at 125 °C) for all the 4 bits/cell operations was achieved in sub-μm scaled RRAM (resistive random access memory) devices.
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spelling pubmed-89997172022-04-12 Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device Shin, Hee Ju Seo, Hyun Kyu Lee, Su Yeon Park, Minsoo Park, Seong-Geon Yang, Min Kyu Materials (Basel) Article TiN/AlO(x):Ti/TaO(x)/TiN memory devices using bilayer resistive switching memory demonstrated excellent durability and capability of QLC (quad-level cell) memory devices. The best nonvolatile memory characteristics with the lowest operation current and optimized 4 bit/cell states were obtained using the Incremental Step Pulse Programming (ISPP) algorithm in array. As a result, a superior QLC reliability (cycle endurance > 1 k at each level of the QLC, data retention > 2 h at 125 °C) for all the 4 bits/cell operations was achieved in sub-μm scaled RRAM (resistive random access memory) devices. MDPI 2022-03-24 /pmc/articles/PMC8999717/ /pubmed/35407734 http://dx.doi.org/10.3390/ma15072402 Text en © 2022 by the authors. https://creativecommons.org/licenses/by/4.0/Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
spellingShingle Article
Shin, Hee Ju
Seo, Hyun Kyu
Lee, Su Yeon
Park, Minsoo
Park, Seong-Geon
Yang, Min Kyu
Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device
title Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device
title_full Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device
title_fullStr Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device
title_full_unstemmed Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device
title_short Quad-Level Cell Switching with Excellent Reliability in TiN/AlOx:Ti/TaOx/TiN Memory Device
title_sort quad-level cell switching with excellent reliability in tin/alox:ti/taox/tin memory device
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC8999717/
https://www.ncbi.nlm.nih.gov/pubmed/35407734
http://dx.doi.org/10.3390/ma15072402
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