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Functional Devices from Bottom-Up Silicon Nanowires: A Review

This paper summarizes some of the essential aspects for the fabrication of functional devices from bottom-up silicon nanowires. In a first part, the different ways of exploiting nanowires in functional devices, from single nanowires to large assemblies of nanowires such as nanonets (two-dimensional...

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Autores principales: Arjmand, Tabassom, Legallais, Maxime, Nguyen, Thi Thu Thuy, Serre, Pauline, Vallejo-Perez, Monica, Morisot, Fanny, Salem, Bassem, Ternon, Céline
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9000537/
https://www.ncbi.nlm.nih.gov/pubmed/35407161
http://dx.doi.org/10.3390/nano12071043
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author Arjmand, Tabassom
Legallais, Maxime
Nguyen, Thi Thu Thuy
Serre, Pauline
Vallejo-Perez, Monica
Morisot, Fanny
Salem, Bassem
Ternon, Céline
author_facet Arjmand, Tabassom
Legallais, Maxime
Nguyen, Thi Thu Thuy
Serre, Pauline
Vallejo-Perez, Monica
Morisot, Fanny
Salem, Bassem
Ternon, Céline
author_sort Arjmand, Tabassom
collection PubMed
description This paper summarizes some of the essential aspects for the fabrication of functional devices from bottom-up silicon nanowires. In a first part, the different ways of exploiting nanowires in functional devices, from single nanowires to large assemblies of nanowires such as nanonets (two-dimensional arrays of randomly oriented nanowires), are briefly reviewed. Subsequently, the main properties of nanowires are discussed followed by those of nanonets that benefit from the large numbers of nanowires involved. After describing the main techniques used for the growth of nanowires, in the context of functional device fabrication, the different techniques used for nanowire manipulation are largely presented as they constitute one of the first fundamental steps that allows the nanowire positioning necessary to start the integration process. The advantages and disadvantages of each of these manipulation techniques are discussed. Then, the main families of nanowire-based transistors are presented; their most common integration routes and the electrical performance of the resulting devices are also presented and compared in order to highlight the relevance of these different geometries. Because they can be bottlenecks, the key technological elements necessary for the integration of silicon nanowires are detailed: the sintering technique, the importance of surface and interface engineering, and the key role of silicidation for good device performance. Finally the main application areas for these silicon nanowire devices are reviewed.
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spelling pubmed-90005372022-04-12 Functional Devices from Bottom-Up Silicon Nanowires: A Review Arjmand, Tabassom Legallais, Maxime Nguyen, Thi Thu Thuy Serre, Pauline Vallejo-Perez, Monica Morisot, Fanny Salem, Bassem Ternon, Céline Nanomaterials (Basel) Review This paper summarizes some of the essential aspects for the fabrication of functional devices from bottom-up silicon nanowires. In a first part, the different ways of exploiting nanowires in functional devices, from single nanowires to large assemblies of nanowires such as nanonets (two-dimensional arrays of randomly oriented nanowires), are briefly reviewed. Subsequently, the main properties of nanowires are discussed followed by those of nanonets that benefit from the large numbers of nanowires involved. After describing the main techniques used for the growth of nanowires, in the context of functional device fabrication, the different techniques used for nanowire manipulation are largely presented as they constitute one of the first fundamental steps that allows the nanowire positioning necessary to start the integration process. The advantages and disadvantages of each of these manipulation techniques are discussed. Then, the main families of nanowire-based transistors are presented; their most common integration routes and the electrical performance of the resulting devices are also presented and compared in order to highlight the relevance of these different geometries. Because they can be bottlenecks, the key technological elements necessary for the integration of silicon nanowires are detailed: the sintering technique, the importance of surface and interface engineering, and the key role of silicidation for good device performance. Finally the main application areas for these silicon nanowire devices are reviewed. MDPI 2022-03-22 /pmc/articles/PMC9000537/ /pubmed/35407161 http://dx.doi.org/10.3390/nano12071043 Text en © 2022 by the authors. https://creativecommons.org/licenses/by/4.0/Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
spellingShingle Review
Arjmand, Tabassom
Legallais, Maxime
Nguyen, Thi Thu Thuy
Serre, Pauline
Vallejo-Perez, Monica
Morisot, Fanny
Salem, Bassem
Ternon, Céline
Functional Devices from Bottom-Up Silicon Nanowires: A Review
title Functional Devices from Bottom-Up Silicon Nanowires: A Review
title_full Functional Devices from Bottom-Up Silicon Nanowires: A Review
title_fullStr Functional Devices from Bottom-Up Silicon Nanowires: A Review
title_full_unstemmed Functional Devices from Bottom-Up Silicon Nanowires: A Review
title_short Functional Devices from Bottom-Up Silicon Nanowires: A Review
title_sort functional devices from bottom-up silicon nanowires: a review
topic Review
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9000537/
https://www.ncbi.nlm.nih.gov/pubmed/35407161
http://dx.doi.org/10.3390/nano12071043
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