Representing logic gates over Euclidean space via heaviside step function

Theoretical concepts asserted by Alan Turing are the basis of the computation and hence of machine intelligence. Turing Machine, the fundamental computational model, has been proven to be reducible to a logic circuit and, at the same time, portable into a computer program that can be expressed through a combination of fundamental programming language control structures. This work proposes a mathematical framework that analytically models logic gates employing Heaviside Step Function. The existence of a correspondence between a generic finite-time algorithm and the proposed mathematical formulation is proven. The proposed interpretation is given through a well-defined logical circuit analytical expression. Relevant geometrical applications, related to polygon processing, having wide implications in engineering branches are presented together with a new Penalty Method for constrained optimization problems handling. A detailed simulation campaign is conducted to assess the effectiveness of the applications derived from the proposed mathematical framework.