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On the Vertically Stacked Gate-All-Around Nanosheet and Nanowire Transistor Scaling beyond the 5 nm Technology Node
This work performs a detailed comparison of the channel width folding effectiveness of the FinFET, vertically stacked nanosheet transistor (VNSFET), and vertically stacked nanowire transistor (VNWFET) under the constraints of the same vertical (fin) height and layout footprint size (fin width) defin...
| Autores principales: | , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
MDPI
2022
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| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9146649/ https://www.ncbi.nlm.nih.gov/pubmed/35630961 http://dx.doi.org/10.3390/nano12101739 |