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Detraque: Dynamic execution tracing techniques for automatic fault localization of hardware design code

In an error-prone development process, the ability to localize faults is a crucial one. Generally speaking, detecting and repairing errant behavior at an early stage of the development cycle considerably reduces costs and development time. The debugging of the Verilog program takes much time to read...

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Autores principales: Wu, Jiang, Zhang, Zhuo, Xu, Jianjun, He, Jiayu, Mao, Xiaoguang, Meng, Xiankai, Li, Panpan
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Public Library of Science 2022
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9481022/
https://www.ncbi.nlm.nih.gov/pubmed/36112632
http://dx.doi.org/10.1371/journal.pone.0274515
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author Wu, Jiang
Zhang, Zhuo
Xu, Jianjun
He, Jiayu
Mao, Xiaoguang
Meng, Xiankai
Li, Panpan
author_facet Wu, Jiang
Zhang, Zhuo
Xu, Jianjun
He, Jiayu
Mao, Xiaoguang
Meng, Xiankai
Li, Panpan
author_sort Wu, Jiang
collection PubMed
description In an error-prone development process, the ability to localize faults is a crucial one. Generally speaking, detecting and repairing errant behavior at an early stage of the development cycle considerably reduces costs and development time. The debugging of the Verilog program takes much time to read the waveform and capture the signal, and in many cases, problem-solving relies heavily on experienced developers. Most existing Verilog fault localization methods utilize the static analysis method to find faults. However, using static analysis methods exclusively may result in some types of faults being inevitably ignored. The use of dynamic analysis could help resolve this issue. Accordingly, in this work, we propose a new fault localization approach for Verilog, named Detraque. After obtaining dynamic execution through test cases, Detraque traces these executions to localize faults; subsequently, it can determine the likelihood of any Verilog statement being faulty and sort the statements in descending order by suspicion score. Through conducting empirical research on real Verilog programs with 61 faulty versions, Detraque can achieve an EXAM score of 18.3%. Thus, Detraque is verified as able to improve Verilog fault localization effectiveness when used as a supplement to static analysis methods.
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spelling pubmed-94810222022-09-17 Detraque: Dynamic execution tracing techniques for automatic fault localization of hardware design code Wu, Jiang Zhang, Zhuo Xu, Jianjun He, Jiayu Mao, Xiaoguang Meng, Xiankai Li, Panpan PLoS One Research Article In an error-prone development process, the ability to localize faults is a crucial one. Generally speaking, detecting and repairing errant behavior at an early stage of the development cycle considerably reduces costs and development time. The debugging of the Verilog program takes much time to read the waveform and capture the signal, and in many cases, problem-solving relies heavily on experienced developers. Most existing Verilog fault localization methods utilize the static analysis method to find faults. However, using static analysis methods exclusively may result in some types of faults being inevitably ignored. The use of dynamic analysis could help resolve this issue. Accordingly, in this work, we propose a new fault localization approach for Verilog, named Detraque. After obtaining dynamic execution through test cases, Detraque traces these executions to localize faults; subsequently, it can determine the likelihood of any Verilog statement being faulty and sort the statements in descending order by suspicion score. Through conducting empirical research on real Verilog programs with 61 faulty versions, Detraque can achieve an EXAM score of 18.3%. Thus, Detraque is verified as able to improve Verilog fault localization effectiveness when used as a supplement to static analysis methods. Public Library of Science 2022-09-16 /pmc/articles/PMC9481022/ /pubmed/36112632 http://dx.doi.org/10.1371/journal.pone.0274515 Text en © 2022 Wu et al https://creativecommons.org/licenses/by/4.0/This is an open access article distributed under the terms of the Creative Commons Attribution License (https://creativecommons.org/licenses/by/4.0/) , which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.
spellingShingle Research Article
Wu, Jiang
Zhang, Zhuo
Xu, Jianjun
He, Jiayu
Mao, Xiaoguang
Meng, Xiankai
Li, Panpan
Detraque: Dynamic execution tracing techniques for automatic fault localization of hardware design code
title Detraque: Dynamic execution tracing techniques for automatic fault localization of hardware design code
title_full Detraque: Dynamic execution tracing techniques for automatic fault localization of hardware design code
title_fullStr Detraque: Dynamic execution tracing techniques for automatic fault localization of hardware design code
title_full_unstemmed Detraque: Dynamic execution tracing techniques for automatic fault localization of hardware design code
title_short Detraque: Dynamic execution tracing techniques for automatic fault localization of hardware design code
title_sort detraque: dynamic execution tracing techniques for automatic fault localization of hardware design code
topic Research Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9481022/
https://www.ncbi.nlm.nih.gov/pubmed/36112632
http://dx.doi.org/10.1371/journal.pone.0274515
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