A steep switching WSe(2) impact ionization field-effect transistor

The Fermi-Dirac distribution of carriers and the drift-diffusion mode of transport represent two fundamental barriers towards the reduction of the subthreshold slope (SS) and the optimization of the energy consumption of field-effect transistors. In this study, we report the realization of steep-slope impact ionization field-effect transistors (I(2)FETs) based on a gate-controlled homogeneous WSe(2) lateral junction. The devices showed average SS down to 2.73 mV/dec over three decades of source-drain current and an on/off ratio of ~10(6) at room temperature and low bias voltages (<1 V). We determined that the lucky-drift mechanism of carriers is valid in WSe(2), allowing our I(2)FETs to have high impact ionization coefficients and low SS at room temperature. Moreover, we fabricated a logic inverter based on a WSe(2) I(2)FET and a MoS(2) FET, exhibiting an inverter gain of 73 and almost ideal noise margin for high- and low-logic states. Our results provide a promising approach for developing functional devices as front runners for energy-efficient electronic device technology.