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An Output-Capacitorless Low-Dropout Regulator with Slew-Rate Enhancement
A novel output-capacitorless low-dropout regulator (OCL-LDO) with an embedded slew-rate-enhancement (SRE) circuit is presented in this paper. The SRE circuit adopts a transient current-boost strategy to improve the slew rate at the gate of the power transistor when a large voltage spike at the outpu...
Autores principales: | , , , , , , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2022
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9608261/ https://www.ncbi.nlm.nih.gov/pubmed/36295947 http://dx.doi.org/10.3390/mi13101594 |
Sumario: | A novel output-capacitorless low-dropout regulator (OCL-LDO) with an embedded slew-rate-enhancement (SRE) circuit is presented in this paper. The SRE circuit adopts a transient current-boost strategy to improve the slew rate at the gate of the power transistor when a large voltage spike at the output is detected. In addition, a feed-forward transconductance cell is introduced to form a push–pull output structure with the power transistor. The simulation results show that the maximum transient output voltage variation is [Formula: see text] when the load current [Formula: see text] is stepped from [Formula: see text] to [Formula: see text] in [Formula: see text] with a load capacitance of [Formula: see text] , and the settling time is [Formula: see text]. The proposed OCL-LDO consumes a quiescent current of [Formula: see text] and has a dropout voltage of [Formula: see text] for the maximum output current of [Formula: see text]. |
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