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High-gain, low-voltage unipolar logic circuits based on nanoscale flexible organic thin-film transistors with small signal delays

One of the circuit topologies for the implementation of unipolar integrated circuits (circuits that use either p-channel or n-channel transistors, but not both) is the zero-V(GS) architecture. Zero-V(GS) circuits often provide excellent static performance (large small-signal gain and large noise mar...

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Detalles Bibliográficos
Autores principales: Haldar, Tanumita, Wollandt, Tobias, Weis, Jürgen, Zschieschang, Ute, Klauk, Hagen, Weitz, R. Thomas, Burghartz, Joachim N., Geiger, Michael
Formato: Online Artículo Texto
Lenguaje:English
Publicado: American Association for the Advancement of Science 2023
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9821857/
https://www.ncbi.nlm.nih.gov/pubmed/36608119
http://dx.doi.org/10.1126/sciadv.add3669
Descripción
Sumario:One of the circuit topologies for the implementation of unipolar integrated circuits (circuits that use either p-channel or n-channel transistors, but not both) is the zero-V(GS) architecture. Zero-V(GS) circuits often provide excellent static performance (large small-signal gain and large noise margins), but they suffer from the large signal delay imposed by the load transistor. To address this limitation, we have used electron-beam lithography to fabricate zero-V(GS) circuits based on organic transistors with channel lengths as small as 120 nm on flexible polymeric substrates. For a supply voltage of 3 V, these circuits have characteristic signal-delay time constants of 14 ns for the low-to-high transition and 560 ns for the high-to-low transition of the circuit’s output voltage. These signal delays represent the best dynamic performance reported to date for organic transistor–based zero-V(GS) circuits. The signal-delay time constant of 14 ns is also the smallest signal delay reported to date for flexible organic transistors.