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A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems

This paper describes a Delta Sigma ADC IC that embeds a 5th-order Continuous-Time Delta Sigma modulator with 40 MHz signal bandwidth, a low ripple 20 to 80 MS/s variable-rate digital decimation filter, a bandgap voltage reference, and high-speed CML buffers on a single die. The ADC also integrates o...

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Detalles Bibliográficos
Autores principales: Fakhoury, Hussein, Jabbour, Chadi, Nguyen, Van-Tam
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2022
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9824276/
https://www.ncbi.nlm.nih.gov/pubmed/36616634
http://dx.doi.org/10.3390/s23010036
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author Fakhoury, Hussein
Jabbour, Chadi
Nguyen, Van-Tam
author_facet Fakhoury, Hussein
Jabbour, Chadi
Nguyen, Van-Tam
author_sort Fakhoury, Hussein
collection PubMed
description This paper describes a Delta Sigma ADC IC that embeds a 5th-order Continuous-Time Delta Sigma modulator with 40 MHz signal bandwidth, a low ripple 20 to 80 MS/s variable-rate digital decimation filter, a bandgap voltage reference, and high-speed CML buffers on a single die. The ADC also integrates on-chip calibrations for RC time-constant variation and quantizer offset. The chip was fabricated in a 1P7M 65 nm CMOS process. Clocked at 640 MHz, the Continuous-Time Delta Sigma modulator achieves 11-bit ENOB and 76.5 dBc THD up to 40 MHz of signal bandwidth while consuming 82.3 mW.
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spelling pubmed-98242762023-01-08 A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems Fakhoury, Hussein Jabbour, Chadi Nguyen, Van-Tam Sensors (Basel) Article This paper describes a Delta Sigma ADC IC that embeds a 5th-order Continuous-Time Delta Sigma modulator with 40 MHz signal bandwidth, a low ripple 20 to 80 MS/s variable-rate digital decimation filter, a bandgap voltage reference, and high-speed CML buffers on a single die. The ADC also integrates on-chip calibrations for RC time-constant variation and quantizer offset. The chip was fabricated in a 1P7M 65 nm CMOS process. Clocked at 640 MHz, the Continuous-Time Delta Sigma modulator achieves 11-bit ENOB and 76.5 dBc THD up to 40 MHz of signal bandwidth while consuming 82.3 mW. MDPI 2022-12-20 /pmc/articles/PMC9824276/ /pubmed/36616634 http://dx.doi.org/10.3390/s23010036 Text en © 2022 by the authors. https://creativecommons.org/licenses/by/4.0/Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).
spellingShingle Article
Fakhoury, Hussein
Jabbour, Chadi
Nguyen, Van-Tam
A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems
title A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems
title_full A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems
title_fullStr A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems
title_full_unstemmed A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems
title_short A 40 MHz 11-Bit ENOB Delta Sigma ADC for Communication and Acquisition Systems
title_sort 40 mhz 11-bit enob delta sigma adc for communication and acquisition systems
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC9824276/
https://www.ncbi.nlm.nih.gov/pubmed/36616634
http://dx.doi.org/10.3390/s23010036
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