“…Among them is the future version of front-end chips in 65-nm CMOS by the CERN RD53 Collaboration which supports small pixel sizes of 50$\times$50 or 25$\times$100 $\mu$m$^2$} and lower charge thresholds ($\approx1000~\textrm{e}^-$).\\ Thin planar n-in-p type silicon sensors (of thickness 100-150 $\mu$m), segmented into pixel sizes of 25$\times$100 $\mu$m$^2$ or 50$\times$50 $\mu$m$^2$ are expected to allow for a good detector resolution that is expected to be more robust with respect to radiation damage compared to the Phase-1 detector. …”
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“…Suggested pixel cell geometries to match this requirement are {50$\times$50 }$\mu$m$^2$ or 25$\times$100 $\mu$m$^2$, leaving little space for design choices and a possible biasing scheme. …”
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