“…However, independent normalization of each sequencing region is a computationally expensive process, therefore our pipeline is customized and can be easily run in the cloud computing environment, on the computer cluster, or the single CPU server. To our knowledge, the presented application is the first attempt to implement an innovative approach to independent normalization of the depth of WES data coverage. …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…All simulations were carried in PyTorch utilizing Quadro 4000 GPU with Intel(R) Xeon(R) CPU E5-1650 v4 @ 3.60 ​GHz processor and 63.9 ​GB useable RAM.…”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…GWAS was performed using three methods (MLM, FarmCPU, and BLINK) simultaneously. A total of 80 SNPs showed significant associations with the 8 traits (p < 1.062 × 10(−6)). …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…With our Raidionics software, running on a desktop computer with CPU support, tumor segmentation can be performed in 16–54 s depending on the dimensions of the MRI volume. …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…Jorge Vaca Uribe, director de la CPU-e, y quien esto escribe con el Lic. Martín Páez Bistrain, coordinador del sitio web de la DGBUV, se nos planteó la posibilidad de rescatar aquéllos primeros números, tal como lo habían hecho el Lic. …”
Enlace del recurso
Enlace del recurso

Enlace del recurso
Enlace del recurso

Enlace del recurso
Enlace del recurso

Enlace del recurso
Enlace del recurso

Enlace del recurso
Enlace del recurso

Enlace del recurso
Enlace del recurso

Enlace del recurso
Enlace del recurso

Enlace del recurso
Enlace del recurso

“…Their outputs were then compared. RESULT: Run time (CPU time) was compared to assess the efficiency of 6 HA methods. …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…To assess the performance of the methods, they were compared to an exhaustive MCMM search using 1,000,000 search steps for each of the 44 macrocycles (requiring ca 200 times more CPU time). Prior to our analysis, we also investigated if the general search methods MCMM and MTLMOD could also be optimized for macrocycle conformational sampling. …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…Currently, 63 research projects have gained access to the HPC@CINECA program, for a total handout of ~ 8 Millions of CPU/hours and, for data storage, ~ 100 TB of permanent and ~ 300 TB of temporary space. …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…Besides, 406 accessions derived from RDP1 with 411,066 SNPs were used to identify QTLs associated with the total spikelets number per panicle (TSNP), grain number per panicle (GNP), empty grain number per panicle (EGNP), primary branch number (PBN), panicle length (PL), and panicle number per plant (PN) by GLM, MLM, FarmCPU, and BLINK models for genome-wide association study (GWAS) analyses. …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…RESULTS: Genome-wide association analysis using 90K SNP array in FarmCPU model revealed several interesting genomic regions including 17 significant SNPs passing false discovery rate threshold and strongly associated with the studied traits. …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…CARE 2.0 is written in C++/CUDA for Linux systems and can be run on the CPU as well as on CUDA-enabled GPUs. It is available at https://github.com/fkallen/CARE. …”
Enlace del recurso
Enlace del recurso
Enlace del recurso

“…Release Problems STRUCTURAL MODELING Module Instantiation Ports Unconnected Ports Port Connection Rules Design Examples Gray-To-Binary Code Converter BCD-To-Decimal Decoder Modulo-10 Counter Adder/Subtractor Four-Function ALU Adder and High-Speed Shifter Array Multiplier Moore-Mealy Synchronous Sequential Machine Moore Synchronous Sequential Machine Moore Asynchronous Sequential Machine Moore Pulse-Mode Asynchronous Sequential Machine Problems TASKS AND FUNCTIONS Tasks Task Declaration Task Invocation Functions Function Declaration Function Invocation Problems ADDITIONAL DESIGN EXAMPLES Johnson Counter Counter-Shifter Universal Shift Register Hamming Code Error Detection and Correction Booth Algorithm Moore Synchronous Sequential Machine Mealy Pulse-Mode Asynchronous Sequential Machine Mealy One-Hot Machine BCD Adder/Subtractor BCD Addition BCD Subtraction Pipelined RISC Processor Instruction Cache Instruction Unit Decode Unit Execution Unit Register File Data Cache RISC CPU Top System Top Problems APPENDIX A Event Queue Event Handling for Dataflow Constructs Event Handling for Blocking Assignments Event Handling for Nonblocking Assignments Event Handline for Mixed Blocking and Nonblocking Assignments APPENDIX B Verilog Project Procedure APPENDIX C Answers to Selected Problems Overview Language Elements Expressions Gate Level Modeling User-Defined Primitives Dataflow Modeling Behavioral Modeling Structural Modeling Tasks and Functions Additional Design Examples INDEX.…”
Enlace del recurso

“…This algorithm, named ghost probability, is fast enough to fit into the CPU time budget of the software trigger farm and thus reduces the combinatorics of the decay reconstructions, as well as the number of tracks that need to be processed by the particle identification algorithms. …”
Enlace del recurso