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581“…The LHCb Experiment will be upgraded to a trigger-less system reading out the full detector at 40 MHz event rate with all selection algorithms executed in a CPU farm. The upgraded Vertex Locator (VELO) will be a hybrid pixel detector read out by the ”VeloPix” ASIC with on-chip zero-suppression. …”
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582
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583por Khalid, Omer, Maljevic, Ivo, Anthony, Richard, Petridis, Miltos, Parrot, Kevin, Schulz, Markus“…Since this overhead varies the types of workload whether they are memory intensive, CPU intensive or network I/O bound, and could lead to unpredictable deadline estimation for the running jobs in the system. …”
Publicado 2010
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584por Khalid, Omer“…This work led to evaluation of various scheduling strategies used by the Xen hypervisor to measure the sensitivity of job performance to the amount of CPU and memory allo- cated under various configurations. …”
Publicado 2011
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585por Gorbunov, Sergey, Rohr, David, Aamodt, Kenneth, Alt, Torsten, Appelshauser, Harald, Arend, Andreas, Bach, Matthias, Becker, Bruce, Bottger, Stefan, Breitner, Timo, Busching, Henner, Chattopadhyay, Sukalyan, Cleymans, Jean, Cicalo, Corrado, Das, Indranil, Djuvsland, Oystein, Engel, Heiko, Erdal, Hege Austrheim, Fearick, Roger, Haaland, Oystein Senneset, Hille, Per Thomas, Kalcher, Sebastian, Kanaki, Kalliopi, Kebschull, Udo Wolfgang, Kisel, Ivan, Kretz, Matthias, Lara, Camillo, Lindal, Sven, Lindenstruth, Volker, Masoodi, Arshad Ahmad, Ovrebekk, Gaute, Panse, Ralf, Peschek, Jorg, Ploskon, Mateusz, Pocheptsov, Timur, Ram, Dinesh, Rascanu, Theodor, Richter, Matthias, Rohrich, Dieter, Ronchetti, Federico, Skaali, Bernhard, Smorholm, Olav, Stokkevag, Camilla, Steinbeck, Timm Morten, Szostak, Artur, Thader, Jochen, Tveter, Trine, Ullaland, Kjetil, Vilakazi, Zeblon, Weis, Robert, Yin, Zhong-Bao, Zelnicek, Pierre“…Additionally a pipeline was implemented so that the tracking on the GPU, the initialization and the output process ed by the CPU, as well as the DMA transfer can overlap. The GPU tracking algorithm significantly outperforms the CPU version for large events while it entirely maintains its efficiency.…”
Publicado 2011
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586por Bawej, Tomasz Adrian, Behrens, Ulf, Branson, James, Chaze, Olivier, Cittolin, Sergio, Darlea, Georgiana Lavinia, Deldicque, Christian, Dobson, Marc, Dupont, Aymeric, Erhan, Samim, Forrest, Andrew Kevin, Gigi, Dominique, Glege, Frank, Gomez Ceballos, Guillelmo, Gomez-Reino Garrido, Robert, Hegeman, Jeroen Guido, Holzner, Andre Georg, Masetti, Lorenzo, Meijers, Franciscus, Meschi, Emilio, Mommsen, Remigius, Morovic, Srecko, Nunez Barranco Fernandez, Carlos, Vivian O'Dell, Orsini, Luciano, Paus, Christoph Maria Ernst, Petrucci, Andrea, Pieri, Marco, Racz, Attila, Sakulin, Hannes, Schwick, Christoph, Stieger, Benjamin Bastian, Sumorok, Konstanty, Veverka, Jan, Wakefield, Christopher Colin, Zejdl, Petr“…TCP and the socket abstraction have barely changed over the last two decades, but at the network layer there has been a giant leap from a few megabits to 100 gigabits in bandwidth. At the same time, CPU architectures have evolved into the multicore era and applications are expected to make full use of all available resources. …”
Publicado 2014
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587por Hasse, C., Albrecht, J., Alves, A.A., d'Argent, P., Evans, T.D., Rademacker, J., Sokoloff, M.D.“…Benchmarks of this functionality show a significant performance increase when utilizing a GPU compared to a CPU. Furthermore, this extension is employed to study the sensitivity on the mixing parameters x and y in a time-dependent amplitude analysis of the decay D0 → K+π−π+π−. …”
Publicado 2017
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588por Torro Pastor, Emma“…We present the tools that allow us to predict and optimize the trigger rates and CPU consumption for the anticipated LHC luminosities. …”
Publicado 2018
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589por Bazzani, A., Giovannozzi, M., Maclean, E.H., Montanari, C.E., Van der Veken, F.F., Van Goethem, W.“…The motivation arises in the possibility of finding a method to reliably extrapolate the results of numerical simulations well beyond what is currently possible in terms of CPU time. In earlier work, a proposal for a model based on Nekhoroshev theorem and Kolmogorov--Arnold--Moser theory was made. …”
Publicado 2019
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590“…In a typical use case, the NLKF outperforms the so-called Extended Kalman Filter in the accuracy and precision of the track parameter estimates obtained, with an increase in CPU time below a factor of two. It is therefore a promising approach for use in applications where precise estimation of track parameters is a key concern.…”
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591por Anderlini, Lucio, Barbetti, Matteo, Corti, Gloria, Davis, Adam, Derkach, Denis, Kazeev, Nikita, Maevskiy, Artem, Mokonenko, Sergei, Siddi, Benedetto Gianluca, Xu, Zehua“…During Run 2 of the Large Hadron Collider at CERN, the LHCb experiment has spent more than 80% of the pledged CPU time to produce simulated data samples. The upgraded LHCb detector, being commissioned now, will be able to collect much larger data samples, requiring many more simulated events to analyze the collected data. …”
Publicado 2022
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592por Wynhoff, Stephan“…Detailed detector simulation and reconstruction of physics objects at the LHC are very CPU intensive and hence time consuming due to the high energy and multiplicity of the Monte-Carlo events and the complexity of the detectors. …”
Publicado 2003
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593por Ammendola, R, Biagioni, A, Frezza, O, Lamanna, G, Lo Cicero, F, Lonardo, A, Martinelli, M, Paolucci, P S, Pastorelli, E, Pontisso, L, Rossetti, D, Simula, F, Sozzi, M, Tosoratto, L, Vicini, P“…NaNet features a Network Interface module that implements RDMA-style communications both with the host (CPU) and the GPU accelerators memories (GPUDirect P2P/RDMA) relying on the services of a high performance PCIe Gen3 x8 core. …”
Publicado 2016
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594por van der Heijden, B, Visser, J, van Beuzekom, M, Boterenbrood, H, Kulis, S, Munneke, B, Schreuder, F“…The SPIDR system consists of an FPGA board with memory and various communication interfaces, FPGA firmware, CPU subsystem and an API library on the PC . The FPGA firmware can be adapted to read out other ASICs by re-using IP blocks. …”
Publicado 2017
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595“…In this report, we will present design considerations, implementation details, and computing performance of parallel pRNG engines on both CPU and GPU. Reproducibility of propagating multiple particles in parallel for HEP event simulation is demonstrated, using GeantV-based examples, for both sequential and fine-grain track-level concurrent simulation wor kflows. …”
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596por Gessinger, Paul, Grasland, Hadrien, Gray, Heather, Kiehn, Moritz, Klimpel, Fabian, Langenberg, Robert, Salzburger, Andreas, Schlag, Bastian, Zhang, Jin, Ai, Xiaocong“…As pattern recognition algorithms exhibit combinatorial scaling to high track multiplicities, they become the largest contributor to the CPU consumption within event reconstruction, particularly at current and future hadron colliders such as the LHC, HL-LHC and FCC-hh. …”
Publicado 2020
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597“…Two computers (one with an Intel Xeon Gold 6142 CPU and the other with an Intel Core i7-11700 CPU) running Ubuntu Linux are used in this experiment. …”
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598“…BACKGROUND: Artificial intelligence (AI) programs that train on large datasets require powerful compute infrastructure consisting of several CPU cores and GPUs. JupyterLab provides an excellent framework for developing AI programs, but it needs to be hosted on such an infrastructure to enable faster training of AI programs using parallel computing. …”
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599por Yoosefzadeh-Najafabadi, Mohsen, Torabi, Sepideh, Tulpan, Dan, Rajcan, Istvan, Eskandari, Milad“…In addition, SVR-mediated GWAS was able to identify more relevant QTL underlying the target traits than the FarmCPU method. Our findings demonstrate the potential use of machine learning algorithms in GWAS to detect durable QTL associated with soybean seed quality traits suitable for genomic-based breeding approaches. …”
Publicado 2023
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600por Lecoeur, Bastien, Barbone, Marco, Gough, Jessica, Oelfke, Uwe, Luk, Wayne, Gaydadjiev, Georgi, Wetscherek, Andreas“…Fast parallelised open-source implementations of the extra-dimensional golden-angle radial sparse parallel algorithm were developed for central processing unit (CPU) and graphics processing unit (GPU) architectures. …”
Publicado 2023
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