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1821“…Similar results are observed in the case of complexity assessment, including testing time, CPU usage, storage size, and pre-processing speed, proving the importance of the proposed android malware analysis model.…”
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1822“…Finally, we evaluate their performance in terms of Packet Delivery Ratio (PDR), CPU utilization, memory usage, execution time and the number of collisions.…”
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1823“…These last results, higher than any previous magnetoplasmonic [Formula: see text]-near-zero sensing approach, were obtained by the GA intelligent program in times ranging from 2 to 5 min (using a simple inexpensive dual-core CPU computer).…”
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1824“…An obvious flaw is that building a deep learning-based model generally requires a lot of CPU computing resources, making the cost too high.…”
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1825por Gómez-Espejo, Ana L., Sansaloni, Carolina Paola, Burgueño, Juan, Toledo, Fernando H., Benavides-Mendoza, Adalberto, Reyes-Valdés, M. Humberto“…We analyzed 990 landraces and seven climatic variables (mean temperature, maximum temperature, precipitation, precipitation seasonality, heat index of mean temperature, heat index of maximum temperature, and drought index) in GEA using the FarmCPU approach with GAPIT. Historical temperature and precipitation values were obtained as monthly averages from 1970 to 2000. …”
Publicado 2022
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1826“…Results show that the middleware is able to distribute queries to servers with adequate capacity, freeing from service requests to devices with hardware restrictions; thus, our SAAQ-based middleware has a good performance regarding throughput (22.52 ms for web queries), end-to-end delay communications (up to 193.30 ms between San Francisco and Amsterdam), and good management of computing resources (up to 80% of CPU consumption).…”
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1827“…Both configurations of the algorithm run at frame rates common for most 3D lidars, 10 and 20 Hz on a standard CPU.…”
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1828“…Therefore, our tracker can exploit comprehensive feature representations in an end-to-end manner, and the proposed model is capable of handling small target tracking in complex scenarios on a CPU at a rate of 29 FPS. Comprehensive experimental results on UAV123, UAV123@10fps, LaSOT, VOT2020, and GOT-10k benchmarks with multiple trackers demonstrate the effectiveness and efficiency of SiamHFFT. …”
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1829por Arkwazee, Haidar A., Wallace, Lyle T., Hart, John P., Griffiths, Phillip D., Myers, James R.“…A GWAS was performed using FarmCPU with one principal component after comparing five models. …”
Publicado 2022
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1830“…This simulation method saved a significant amount of CPU time required for the growth of dust cake. It was found that the relative average deviations between experimental and simulated pressure drops were 3.12% and 1.19% for V-shaped and U-shaped filters, respectively. …”
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1831por Lopez-Perez, Juan Antonio“…That is the Berkeley Open Infrastructure for Network C omputing middle-ware (BOINC) developed for the SETI@home project, a Grid specialised in high CPU requirements and in using volunteer computing resources. …”
Publicado 2008
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1832por González Gaudiano, Édgar Javier“…El número conmemorativo de la revista CPU-e que aquí se presenta tiene como finalidad la de aportar un registro documental sobre la historia del Instituto de Investigaciones en Educación de la Universidad Veracruzana, con motivo del cuarenta aniversario de su fundación. …”
Publicado 2017
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1833“…This allows building lowest trigger levels based on standard off-the-shelf PCs with CPU and GPU (instead of the commonly adopted solutions based on custom electronics with FPGA or ASICs) with enhanced and high performance computation capabilities, resulting in high rejection power, high efficiency and simpler low level triggers. …”
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1834por Chauhan, N, Kabra, G, Kittelmann, T, Langenberg, R, Mandrysch , R, Salzburger, A, Seuster, R, Ritsch, E, Stewart, G, van Eldik, N, Vitillo, R“…This framework analyses the CPU and memory performance of algorithms and an overview of results are presented on a web page. …”
Publicado 2013
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1835por Bauer, Gerry, Bawej, Tomasz Adrian, Behrens, Ulf, Branson, James, Chaze, Olivier, Cittolin, Sergio, Coarasa Perez, Jose Antonio, Darlea, Georgiana Lavinia, Deldicque, Christian, Dobson, Marc, Dupont, Aymeric, Erhan, Samim, Gigi, Dominique, Glege, Frank, Gomez Ceballos, Guillelmo, Gomez-Reino Garrido, Robert, Hartl, Christian, Hegeman, Jeroen Guido, Holzner, Andre Georg, Masetti, Lorenzo, Meijers, Franciscus, Meschi, Emilio, Mommsen, Remigius, Morovic, Srecko, Nunez Barranco Fernandez, Carlos, O'Dell, Vivian, Orsini, Luciano, Ozga, Wojciech Andrzej, Paus, Christoph Maria Ernst, Petrucci, Andrea, Pieri, Marco, Racz, Attila, Raginel, Olivier, Sakulin, Hannes, Sani, Matteo, Schwick, Christoph, Spataru, Andrei Cristian, Stieger, Benjamin Bastian, Sumorok, Konstanty, Veverka, Jan, Wakefield, Christopher Colin, Zejdl, Petr“… % We are presenting the design of the 2nd generation DAQ system, including studies of the event builder based on advanced networking technologies such as 10 and 40 Gbit/s Ethernet and 56 Gbit/s FDR Infiniband and exploitation of multicore CPU architectures. % By the time the LHC restarts after the 2013/14 shutdown, the current compute nodes, networking, and storage infrastructure will have reached the end of their lifetime. …”
Publicado 2013
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1836por Mende, Martina“…Computer algebraic and numerical calculations require terabyte storage and many CPU years, even after intense parallelization, to obtain state-of-the-art theoretical predictions. …”
Publicado 2014
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1837por Leggett, Charles, Stewart, Graeme, Calafiura, Paolo, Wynne, Benjamin, Malon, David, Lampl, Walter“…This programming model has increasing difficulty in exploiting the potential of current CPUs, which offer their best performance only through taking full advantage of multiple cores and wide vector registers. Future CPU evolution will intensify this trend, with core counts increasing and memory per core falling. …”
Publicado 2015
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1838por CARMINATI, ON BEHALF OF THE GEANTV PROJECT, Federico“…We will present the challenges, solutions and resulting performance of running an end to end detector simulation concurrently on a main stream CPU and a coprocessor and detail the broker implementation bridging the disparity between the two architectures. …”
Publicado 2015
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1839por André, Jean-Marc, Behrens, Ulf, Bocci, Andrea, Branson, James, Cittolin, Sergio, Da Silva Gomes, Diego, Darlea, Georgiana-Lavinia, Deldicque, Christian, Demiragli, Zeynep, Dobson, Marc, Doualot, Nicolas, Erhan, Samim, Fulcher, Jonathan Richard, Gigi, Dominique, Gladki, Maciej, Glege, Frank, Gomez-Ceballos, Guillelmo, Hansen, Magnus, Hegeman, Jeroen, Holzner, André, Lettrich, Michael, Mecionis, Audrius, Meijers, Frans, Meschi, Emilio, Mommsen, Remigius K., Morovic, Srecko, O'Dell, Vivian, Orn, Samuel Johan, Orsini, Luciano, Papakrivopoulos, Ioannis, Paus, Christoph, Petrucci, Andrea, Pieri, Marco, Rabady, Dinyar, Rácz, Attila, Rapsevicius, Valdas, Reis, Thomas, Sakulin, Hannes, Schwick, Christoph, Šimelevičius, Dainius, Stankevicius, Mantas, Troska, Jan, Velez, Cristina Vazquez, Wernet, Christian, Zejdl, Petr“…This paper presents the baseline design of the DAQ and HLT systems for Phase-2, taking into account the projected evolution of high speed network fabrics for event building and distribution, and the anticipated performance of general purpose CPU. In addition, some opportunities offered by reading out and processing parts of the detector data at the full LHC bunch crossing rate (40 MHz) are discussed.…”
Publicado 2018
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1840por Coyle, Loic Thomas Davies“…The aim is to then use this model instead of the extremely computationally expensive SixTrack simulations, thus allowing the gained CPU time to be spent elsewhere, leading to more thorough studies.…”
Publicado 2020
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