Materias dentro de su búsqueda.
Materias dentro de su búsqueda.
educación superior
30
higher education
27
Educación superior
15
educación básica
11
teacher training
10
México
9
escritura
9
aprendizaje
8
educación
8
estudiantes
8
teachers
8
youth
8
basic education
7
competencias
7
educación primaria
7
interculturalidad
7
lectura
7
política educativa
7
Argentina
6
educational research
6
environmental education
6
estudiantes indígenas
6
intercultural education
6
investigación educativa
6
learning
6
profesores
6
students
6
Educación ambiental
5
Educación intercultural
5
Mexico
5
-
1841por Reiss, Florian“…Changes to the original CPU implementation to achieve a fast and efficient algorithm are presented. …”
Publicado 2021
Enlace del recurso
-
1842por Marcon, Caterina, Carminati, Leonardo, Van Gemmeren, Peter, Mete, Alaettin Serhan“…The increased footprint foreseen for Run-3 and HL-LHC data will soon expose the limits of currently available storage and CPU resources. Data formats are already optimized according to the processing chain for which they are designed. …”
Publicado 2023
Enlace del recurso
-
1843por Marcon, Caterina, Mete, Alaettin Serhan, Van Gemmeren, Peter, Carminati, Leonardo“…The increased footprint foreseen for Run-3 and HL-LHC data will soon expose the limits of currently available storage and CPU resources. Data formats are already optimized according to the processing chain for which they are designed. …”
Publicado 2023
Enlace del recurso
-
1844por Haefeli, G“…The output of the board is sent to the Gigabit based event builder network and processed on the the combined L1 and High Level Trigger CPU farm. The data rate of 30 Gbit/s on the input of TELL1 can be managed using large FPGAs, highest density DDR SDRAM and fast PCB interconnects. …”
Publicado 2004
Enlace del recurso
-
1845“…The redundancy has increased the complexity of the network, but we managed to hide this from the event-builder “applications” on the FPGA and the individual CPU nodes. This setup and challenges with it will be described in this paper. …”
Enlace del recurso
Enlace del recurso
-
1846por Bonacorsi, D, Boccali, T, Giordano, D, Girone, M, Neri, M, Magini, N, Kuznetsov, V, Wildish, T“…These patterns, if understood, can be used as input to simulation of computing models at the LHC, to optimise existing systems by tuning their behaviour, and to explore next-generation CPU/storage/network co-scheduling solutions. This is of great importance, given that the scale of the computing problem will increase far faster than the resources available to the experiments, for Run-2 and beyond. …”
Publicado 2015
Enlace del recurso
Enlace del recurso
-
1847por Sotiropoulou, C L, Maznas, I, Citraro, S, Annovi, A, Ancu, L S, Beccherle, R, Bertolucci, F, Biesuz, N, Calabrò, D, Crescioli, F, Dimas, D, Dell'Orso, M, Donati, S, Gentsos, C, Giannetti, P, Gkaitatzis, S, Gramling, J, Greco, V, Kalaitzidis, P, Kordas, K, Kimura, N, Kubota, T, Iovene, A, Lanza, A, Luciano, P, Magnin, B, Mermikli, K, Nasimi, H, Negri, A, Nikolaidis, S, Piendibene, M, Sakellariou, A, Sampsonidis, D, Volpi, G“…The complete AM-based processor consumes much less power (~50 kW) than its CPU equivalent and its size is much smaller. The AMBSLP has a power consumption of ~250 W and there will be 16 of them in a crate. …”
Publicado 2017
Enlace del recurso
Enlace del recurso
-
1848por Amadio, Guilherme, Ananya, Apostolakis, John, Bandieramonte, Marilena, Behera, S P, Bhattacharyya, Abhijit, Brun, Rene, Canal, Philippe, Carminati, Federico, Cosmo, Gabriele, Drohan, Vitalji, Elvira, Victor Daniel, Genser, Krzysztof, Gheata, Andrei, Gheata, Mihaela, Goulas, Ilias, Hariri, Farah, Vladimir, Ivanchenko, Khattak, Gul Ruk, Konstantinov, Dmitri, Kumawat, Harpool, Lima, Jose Guilherme, Martinez Castro, Jesus, Mato, Pere, Mendez, Patricia, Miranda Aguillar, Aldo, Nikolics, Katalin, Novak, Mihaly, Orlova, Elena, Pedro, Kevin, Pokorski, Witold, Ribon, Alberto, Savin, Dmitry, Schmitz, Ryan, Sehgal, Raman, Shadura, Oksana, Sharan, Shruti, Vallecorsa, Sofia, Wenzel, Sandro Christian, Jun, Soon Yung“…The second phase consists of a thorough investigation on the possibility to vectorise the most CPU-intensive physics code parts, such as final state sampling. …”
Publicado 2019
Enlace del recurso
Enlace del recurso
-
1849
-
1850
-
1851
-
1852
-
1853
-
1854por Zabalgoitia Herrera, MauricioEnlace del recurso
Publicado 2019
Enlace del recurso
Online Artículo -
1855
-
1856por Mujica Johnson, Felipe NicolásEnlace del recurso
Publicado 2019
Enlace del recurso
Online Artículo -
1857
-
1858
-
1859
-
1860