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1961“…The processing speed of the single-core CPU was 22.32 fps/s. The proposed method had strong robustness in predicting rows of different crops. …”
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1962“…Finally, we constructed the optimization problem of minimizing the weighted sum of delay and energy consumption, relying on jointly optimizing the AUV CPU frequency and signal transmission power. In order to solve this complex optimization problem of high-dimensional non-convex time series accumulation, we transformed the problem into a Markov decision process (MDP) and use the proximal policy optimization 2 (PPO2) algorithm to solve this problem. …”
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1963por Bang, Ina, Khanh Nong, Linh, Young Park, Joon, Thi Le, Hoa, Mok Lee, Sang-, Kim, Donghyuk“…Additionally, users could exploit the free GPU and CPU resources allocated by Colab to carry out computing tasks regardless of the performance of their local machines. …”
Publicado 2022
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1964“…The purpose of the study is to examine the usage impact of memory, cache, storage, and bus on CPU performance using the Sugeno type and Mamdani type ANFIS models to determine the state of the computer system. …”
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1965“…Surprisingly, the smaller size of our syllabic data structures allows for more efficient iteration and CPU cache usage, granting Syllable-Query even faster runtime than existing solutions. …”
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1966por Farek, Jesse, Hughes, Daniel, Salerno, William, Zhu, Yiming, Pisupati, Aishwarya, Mansfield, Adam, Krasheninina, Olga, English, Adam C, Metcalf, Ginger, Boerwinkle, Eric, Muzny, Donna M, Gibbs, Richard, Khan, Ziad, Sedlazeck, Fritz J“…FINDINGS: We have developed xAtlas, a single-sample variant caller for single-nucleotide variants (SNVs) and small insertions and deletions (indels) in NGS data. xAtlas features rapid runtimes, support for CRAM and gVCF file formats, and retraining capabilities. xAtlas reports SNVs with 99.11% recall and 98.43% precision across a reference HG002 sample at 60× whole-genome coverage in less than 2 CPU hours. Applying xAtlas to 3,202 samples at 30× whole-genome coverage from the 1000 Genomes Project achieves an average runtime of 1.7 hours per sample and a clear separation of the individual populations in principal component analysis across called SNVs. …”
Publicado 2023
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1967“…Based on our experiments, performed by Samsung Galaxy SM-N960N, which carries system on chip (SoC) as Qualcomm Snapdragon 845 and a CPU of 4 × 2.8 GHz Kyro 385, our method can generate a high-resolution panorama. …”
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1968“…For three of the four data sets, mSigHdp had the best positive predictive value for discovering mutational signatures, and for all four data sets, it had the best true positive rate. Its CPU usage was similar to that of the NMF-based approaches. …”
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1969por Binet, S, Calafiura, P, Lavrijsen, W, Leggett, Ch, Lesny, D, Jha, M K, Severini, H, Smith, D, Snyder, S, Tatarkhanov, M, Tsulaia, V, van Gemmeren, P, Washbrook, A“…Using Linux fork() and the Copy On Write mechanism we implemented a simple event task farm which allows to share up to 50% memory pages among event worker processes with negligible CPU overhead. By leaving the task of managing shared memory pages to the operating system, we have been able to run in parallel large reconstruction and simulation applications originally written to be run in a single thread of execution with little to no change to the application code. …”
Publicado 2011
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1970“…In addition, we will present CARMA, the CUDA on ARM development board hosting a NVIDIA Tegra CPU and CUDA GPU, and show how to use these boards to explore an exciting high-performance, low power consumption node architecture. …”
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1971por Chauhan, N, Kabra, G, Kittelmann, T, Langenberg, R, Mandrysch , R, Salzburger, A, Seuster, R, Ritsch, E, Stewart, G, van Eldik, N, Vitillo, R“…This framework analyses the CPU and memory performance of algorithms and an overview of results are presented on a web page. …”
Publicado 2013
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1972“…Using coarse-grained parallelism all three approaches (OpenMP, Cilk Plus, and TBB) showed good parallel speed-up on the available CPU cores. The best one was obtained with OpenMP, but by combining Cilk Plus and TBB with MPI in order to tie processes to sockets, these two software methods nicely closed the gap and TBB came out with a slight advantage in the end. …”
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1973por Boettger, Stefan“…This capability of the framework is shown for the HLT-Chain application: In an empirical evaluation the cluster CPU usage is increased from 49% to 79%, additional results are computed and no negative effect towards the HLT-Chain application are observed.…”
Publicado 2014
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1974“…This programming model has increasing difficulty in exploiting the potential of current CPUs, which offer their best performance only through taking full advantage of multiple cores and wide vector registers. Future CPU evolution will intensify this trend, with core counts increasing and memory per core falling. …”
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1975por SZOSTEK, Pawel, GUERRI, Marco, GRIGORE, Alexandru, BONFILLOU, Eric, VALSAN, Liviu“…After an initial evaluation of two OCP twin server enclosures in 2013, we decided to launch a tender for acquiring OCP compliant hardware comprising both CPU servers and storage. We will introduce the OCP designs currently available on the market, the advantages they provide and how OCP could fit with CERN's computing and storage needs in the future. …”
Publicado 2015
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1976por Ballestrero, Sergio, Bogdanchikov, Alexander, Brasolin, Franco, Contescu, Alexandru Cristian, Dubrov, Sergei, Fazio, Daniel, Korol, Aleksandr, Lee, Christopher Jon, Scannicchio, Diana, Twomey, Matthew Shaun“…Virtualisation has also been used to adapt the High Level Trigger farm as a batch system, which has been used for running Monte Carlo production jobs that are mostly CPU and not I/O bound. Finally, monitoring the health and the status of $\sim 3000$ machines in the experimental area is obviously of the utmost importance, so the obsolete Nagios v2 has been replaced with Icinga, complemented by Ganglia as a performance data provider. …”
Publicado 2015
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1977por Heim, Timon“…The YARR system was developed with focus on the usage of modern multi core CPU architectures, and an FPGA interfaced via a PCIe link. …”
Publicado 2016
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1978por Borodin, Mikhail, Barreiro Megino, Fernando Harald, De, Kaushik, Golubkov, Dmitry, Klimentov, Alexei, Maeno, Tadashi, Mashinistov, Ruslan, Padolski, Siarhei, Wenaus, Torre“…It achieves high utilization by combining dynamic job definition based on many criterias, such as input and output size, memory requirements and CPU consumption with manageable scheduling policies and by supporting different kind of computational resources, such as GRID, clouds, supercomputers and volunteering computers. …”
Publicado 2016
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1979por Andre, Jean-Marc Olivier, Behrens, Ulf, Branson, James, Brummer, Philipp Maximilian, Chaze, Olivier, Cittolin, Sergio, Contescu, Cristian, Craigs, Benjamin Gordon, Darlea, Georgiana Lavinia, Deldicque, Christian, Demiragli, Zeynep, Dobson, Marc, Doualot, Nicolas, Erhan, Samim, Fulcher, Jonathan F, Gigi, Dominique, Michail Gladki, Glege, Frank, Gomez Ceballos, Guillelmo, Hegeman, Jeroen Guido, Holzner, Andre Georg, Janulis, Mindaugas, Jimenez Estupinan, Raul, Masetti, Lorenzo, Meijers, Franciscus, Meschi, Emilio, Mommsen, Remigius, Morovic, Srecko, O'Dell, Vivian, Orsini, Luciano, Paus, Christoph Maria Ernst, Petrova, Petia, Pieri, Marco, Racz, Attila, Reis, Thomas, Sakulin, Hannes, Schwick, Christoph, Simelevicius, Dainius, Zejdl, Petr“…In this paper we discuss the baseline design of the DAQ and HLT systems for the phase-2, taking into account the projected evolution of high speed network fabrics for event building and distribution, and the anticipated performance of general purpose CPU. Implications on hardware and infrastructure requirements for the DAQ "data center" are analysed. …”
Publicado 2017
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1980“…The model linearly combines different job aspects such as the machine specific CPU time in order to get the results for one workflow on one machine, which is then extrapolated to a whole Cloud infrastructure. …”
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