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Mostrando 181 - 200 Resultados de 392 Para Buscar '"VLSI"', tiempo de consulta: 0.26s Limitar resultados
  1. 181
    Publicado 2019
    Enlace del recurso
    31st IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT2018)
  2. 182
    Enlace del recurso
    An experimental approach to cdma and interference mitigation: from system architecture to hardware testing through VLSI design
  3. 183
    por Lo Presti, Domenico
    Publicado 2005
    Enlace del recurso
    Enlace del recurso
    A VLSI Full Custom ASIC Front End for the Optical Module of NEMO Underwater Neutrino Detector
  4. 184
    por Indiveri, Giacomo
    Publicado 2008
    Enlace del recurso
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    Enlace del recurso
    Online Artículo Texto
    Neuromorphic VLSI Models of Selective Attention: From Single Chip Vision Sensors to Multi-chip Systems
  5. 185
    Enlace del recurso
    VLSI-SoC: 26th IFIP WG 10 5IEEE international conference on very large scale integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018, revised and extended selected papers
  6. 186
    Enlace del recurso
    VLSI-SoC: 22nd IFIP WG 10. 5/IEEE international conference on very large scale integration, VLSI-SoC 2014, Playa del Carmen, Mexico, October 6-8, 2014, revised selected papers
  7. 187
    Enlace del recurso
    Study of time and charge resolution of drift chamber pulses using a fast VLSI waveform sampler chip
  8. 188
    por Carminati, F, Della Negra, Michel, Giani, S, Glaser, M, Hervé, A, Le Goff, J M, Lemeilleur, F, Pimiä, M, Radermacher, E, Verweij, H, Baturitsky, M A, Chalyshev, V, Cheremuhin, A E, Eidelman, B, Eremin, V V, Golubyh, S M, Golutvin, I A, Ivanjutin, L, Izhevsky, V, Kalagin, I V, Kharlamov, V M, Kozlov, Yu Z, Kuchinskii, P, Lomako, V M, Losanu, S, Lukyanov, I, Makarov, S, Merkin, I, Milvidskii, M G, Minashkin, V F, Peshekhonov, V D, Petrov, V, Rasshevsky, A, Savin, I A, Sergeev, S, Shumeiko, N M, Sidorov, A, Susova, N Y, Vasilescu, A, Verbitskaya, E, Yaremchuk, A I, Yavid, V, Zamyatin, N I, Zhiltsov, V E, Zubarev, V N, Zverolovlev, V, Baldini, A, Bocciolini, M, Borchi, E, Cartacci, A M, Civinini, C, D'Alessandro, R, Gallo, E, Meschini, M, Pieri, M, Spillantini, P, Acciarri, M, Avanzini, P G, Baschirotto, A, Benetti, S, Cai, G, Castello, R, Furetta, C, Gola, A, Menniti, P, Paludetto, R, Pensotti, S, Pizzini, S, Rancoita, P G, Rattaggi, M, Terzi, G, Brashear, H R, Britton, C L, Cohn, H O, Todd, R, Barone, L, Borgia, B, Diemoz, M, Longo, E, Organtini, G, Berridge, P K, Berridge, S C, Bugg, W M, Du, Y C, Hargis, H J, Kroeger, R A, Tsveybak, I, Weidemann, A W, Szoncsó, F, Walzel, G, Wulz, Claudia Elisabeth
    Publicado 1992
    Enlace del recurso
    A silicon hadron calorimeter module operated in a strong magnetic field with VLSI read out for LHC
  9. 189
    Enlace del recurso
    FILTRES: a 128 channels VLSI mixed front-end read out electronic development for microstrip detectors
  10. 190
    Enlace del recurso
    Vlsi chip design with the hardware description language VERILOG: an introduction based on a large RISC processor design
  11. 191
    Enlace del recurso
    Enlace del recurso
    Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: practical design aspects
  12. 192
    por Nürnberger, H A
    Publicado 1996
    Enlace del recurso
    Aufbau zweier Detektormodule aus doppelseitigen Silizium-Streifenzaelern in Zweifach-Metall- Lagentechnolgie mit rauscharmen VLSI-Verstaerkerchips
  13. 193
    Enlace del recurso
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    Enlace del recurso
    Online Artículo Texto
    VLSI Implementation of a 2.8 Gevent/s Packet-Based AER Interface with Routing and Event Sorting Functionality
  14. 194
    “…Our design benefits from Very Large Scale Integrated-circuit (VLSI) technology to provide considerable scalability and high-speed, as much as 365× faster than real-time. …”
    Enlace del recurso
    Enlace del recurso
    Enlace del recurso
    Online Artículo Texto
    Emulated muscle spindle and spiking afferents validates VLSI neuromorphic hardware as a testbed for sensorimotor function and disease
  15. 195
    “…At present, the design of a competent system in Very Large Scale Integration (VLSI) technology requires these VLSI parameters to be finely defined. …”
    Enlace del recurso
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    Online Artículo Texto
    An Asynchronous Low Power and High Performance VLSI Architecture for Viterbi Decoder Implemented with Quasi Delay Insensitive Templates
  16. 196
    por Jang, Sung-Joon, Hwang, Youngbae
    Publicado 2020
    “…Furthermore, the proposed VLSI design of the NABF achieves 10.5 and 95.7 times higher throughput and uses 63.6–97.5% less internal memory than state-of-the-art bilateral filter designs.…”
    Enlace del recurso
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    Online Artículo Texto
    Noise-Aware and Light-Weight VLSI Design of Bilateral Filter for Robust and Fast Image Denoising in Mobile Systems
  17. 197
    Enlace del recurso
    VLSI-SoC: 25th IFIP WG 10 5IEEE international conference on very large scale integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017, revised and extended selected papers
  18. 198
    Enlace del recurso
    Enlace del recurso
    Fast RICH detector using a MWPC at atmospheric pressure with a pad structure read out by VLSI circuits
  19. 199
    por Skinderviken, R
    Publicado 1994
    Enlace del recurso
    Metode for selektiv utlesning av måleverdier i en strålingsdetektor ved CERN: spesifikasjon, design og VLSI-implementasjon
  20. 200
    Publicado 1988
    Enlace del recurso
    5th Conference of the Massachusetts Institute of Technology (MIT) on Advanced Research in VLSI: Design and Applications of Very Large-scale Systems
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