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261por Bächler, J, Bracinik, J, Fischer, H G, Flammier, M, Janik, R, Legrand, J C, Musa, L, Pikna, M, Sitár, B, Szymanski, P“…The Tape Automatic Bonding (TAB) process makes it possible tomount the VLSI analog front end electronics directly on the back face of the multilayer board carrying the ring cathodeelements, yielding high channel density. …”
Publicado 1998
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262por Moraes, D, Anelli, G, Despeisse, M, Dissertori, G, Garrigos, A, Jarron, P, Kaplon, J, Miazza, C, Shah, A, Viertel, Gert M, Wyrsch, N“…The sensor consists of an array of 48 square pixels with 380 mum pitch based on a n-i-p hydrogenated amorphous silicon (a-Si:H) film deposited on top of a VLSI chip. The deposition was performed by VHF-PECVD, which enables high rate deposition up to 2 nm/s. …”
Publicado 2004
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263por Braem, André, Chesi, Enrico Guido, Joram, Christian, Mathot, Serge, Séguinot, Jacques, Weilhammer, Peter, Ciocia, F, De Leo, R, Nappi, E, Vilardi, I, Argentieri, A, Corsi, F, Dragone, A, Pasqua, D“…Both the photodetector and its VLSI readout electronics are custom designed and have been tailored to the requirements of a recently proposed novel geometrical concept of a Positron Emission Tomograph. …”
Publicado 2007
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264“…We describe a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture, optimized for on-line track finding in high-energy physics experiments. …”
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265“…This book describes the design of low-voltage analog integrated filters using current mirrors, one of the most common building blocks both in analog and mixed-signal VLSI circuits, offering the advantages of low-voltage operation, derivation of resistorless topologies and electronic adjustment capability of their frequency characteristics. …”
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266por Andreani, A, Annovi, A, Beccherle, B, Beretta, M, Citterio, M, Crescioli, F, Colombo, A, Giannetti, P, Liberali, V, Shojaii, J, Stabile, A“…The AMchip is a VLSI device that implements the associative memory function, a special content addressable memory specifically designed for high energy physics applications and first used in the CDF experiment at Tevatron. …”
Publicado 2013
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267“…The fourteen chapters, written by recognized authorities representing industrial and academic institutions, cover thoroughly the oxygen related phenomena from the crystal growth to device fabrication processes, as well as indispensable diagnostic techniques for oxygen.Key Features* Comprehensive study of the behavior of oxygen in silicon* Discusses silicon crystals for VLSI and ULSI applications* Thorough coverage from crystal growth to device fabrication* Edited by technical experts in the field* Written by recognized authorities from industrial and academic institutions* Useful to graduate students, scientists in other disciplines, and active participants in the arena of silicon-based microelectronics research* 297 original line drawings…”
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268por Chesi, Enrico Guido, Braem, André, Joram, C, Mathot, S, Séguinot, Jacques, Weilhammer, P, Ciocia, F, De Leo, R, Nappi, E, Vilardi, I, Argentieri, A, Corsi, F, Dragone, A, Pasqua, D“…Both the photodetector and its VLSI readout electronics are custom designed and have been tailored to the requirements of a recently proposed novel geometrical concept of a Positron Emission Tomograph. …”
Publicado 2006
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269por Annovi, A, Crescioli, F, Dell'Orso, M, Giannetti, P, Volpi, G, Stabile, A, Liberali, V, Beretta, M, Sacco, I“…We describe a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture, optimized for on-line track finding in high-energy physics experiments. …”
Publicado 2012
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270por Andreani, A, Annovi, A, Beccherle, R, Beretta, M, Citterio, M, Crescioli, F, Colombo, A, Giannetti, P, Liberali, V, Shojaii, S, Stabile, A“…The AMchip is a VLSI device that implements the associative memory function, a special content\naddressable memory specifically designed for high energy physics applications and first used in the\nCDF experiment at Tevatron. …”
Publicado 2013
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271“…It has time resolution of 20 ns with a 1.3 microsecond pipeline and parallel readout of 4000 pad sectors. Fast digital VLSI electronics has been developed for readout and 24000 channels have been tested. …”
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272por Regenfus, C“…The frontend electronic also working at 80 K is realised in VLSI CMOS technology and features a self- triggering capability.…”
Publicado 2003
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273por Awate, Shubham Sukumar, Mostek, Brendan, Kumari, Shalini, Dong, Chengye, Robinson, Joshua A., Xu, Ke, Fullerton-Shirey, Susan K.“…Typical thicknesses are on the order of micrometers, but thinner electrolytes (nanometers) are needed for very-large-scale-integration (VLSI) in terms of both physical thickness and the speed that accompanies scaling. …”
Publicado 2023
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274“…This paper presents a novel VLSI architecture for image segmentation. The architecture is based on the fuzzy c-means algorithm with spatial constraint for reducing the misclassification rate. …”
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275“…The full set of output electrical device parameters I(on), I(off), SS, V(th), and maximal device temperature Tmax was discussed to achieve the optimum VLSI characteristics.…”
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276por J M Veendrick, Harry“…Coverage includes all associated disciplines of nanometer CMOS ICs, including physics, lithography, technology, design, memories, VLSI, power consumption, variability, reliability and signal integrity, testing, yield, failure analysis, packaging, scaling trends and road blocks. …”
Publicado 2017
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277por Regenfus, C“…The frontend electronics (working point 77 K), realised in VLSI CMOS technique, features a self triggering capability of independent sub modules.…”
Publicado 2001
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278Publicado 1990Tabla de Contenidos: “…Communication networks / N. Pippenger. VLSI theory / Th. Lengauer.…”
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279por Taha, Saleem Mohammed Ridha“…Researchers in academia or industry and graduate students, who work in logic synthesis, quantum computing, nano-technology, and low power VLSI circuit design, will be interested in this book.…”
Publicado 2016
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280“…These include an SRAM, a baseband spread spectrum transmitter, a neuron cell and a Field Programmable Gate Array (FPGA) platform in the digital domain, as well as high bandwidth single-stage and operational amplifiers, RF communication circuits in the analog domain, in order to show this technology’s true potential for the next generation VLSI. Describes Silicon Nanowire (SNW) Transistors, as vertically constructed MOS n and p-channel transistors, with low static and dynamic power consumption and small layout footprint; Targets System-on-Chip (SoC) design, supporting very high transistor count (ULSI), minimal power consumption requiring inexpensive substrates for packaging; Enables fabrication of different types of memory on the same chip, such as capacitive cells and transistors with floating gates that can be used as DRAMs and Flash memories.…”
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