Resultados de búsqueda - "serialism" :: Descubridor de recursos de la Universidad Veracruzana

6601

Digital design: basic concepts and principles

por Karim, Mohammad A, Chen, Xinghao
Publicado 2007

“…DATA TYPE AND REPRESENTATIONS Positional Number Systems Number System Conversion Negative Numbers Binary Arithmetic Unconventional Number System Binary Codes Error Detecting and Correcting Codes CAD System BOOLEAN ALGEBRA Logic Operations Logic Functions from Truth Tables Boolean Algebra MINIMIZATION OF LOGIC FUNCTIONS Karnaugh Map Incompletely Specified Functions in K-Map K-Maps for Product-of-sum Form of Functions Map-entered Variables Hazards Single-output Q-M Tabular Reduction Multiple-output Q-M Tabular reduction LOGIC FUNCTION IMPLEMENTATION Introduction Functionally Complete Operation Sets NAND-only and NOR-only Implementations Function Implementation Using XOR and XNOR Logic Circuit Implementation Using Gate Arrays Logic Function Implementation Using Multiplexers Logic Function Implementation Using Demultiplexers andecoders Logic Function Implementation Using ROM Logic Function Implementation Using PLD Logic Function Implementation Using Threshold Logic Logic Function Implementation Using Transmission Gates INTRODUCTION TO VHDL VHDL Programming Environment Structural VHDL Functional VHDL Behavioral VHDL Hierarchical VHDL Logic Circuit Synthesis with Xilinx WebPACK ISE Project Navigator Simulation of Timing Characteristics Logic Circuit Implementation with FPGA Device DESIGN OF MODULAR COMBINATORIAL COMPONENTS Introduction Special-purpose Decoders and Encoders Code Converters Error-detecting and Error-correcting Circuits Binary Arithmetic Binary Subtraction High-Speed Addition BCD Arithmetic Comparators Combinatorial Circuit Design Using VHDL Arithmetic Logic Unit ALU Design Using VHDL SEQUENTIAL LOGIC ELEMENTS Latches Set-Reset Flip-Flop JK Flip-Flop Master-Slave Flip-Flop Edge-Triggered Flip-Flop Delay and Trigger Flip-Flop Monostable Flip-Flop Design of Sequential Elements Using VHDL Sequential Circuits SYNCHRONOUS SEQUENTIAL CIRCUITS Formalism Mealy and Moore Models Analysis of Sequential Circuits Equivalent States Incompletely Specified Sequential Circuits State Assignments Design Algorithm Synchronous Sequential Circuit Implementation Using VHDL MODULAR SEQUENTIAL COMPONENTS Synchronous Counters Registers Shift Registers as Counters Counter and Register Applications RTL Registers and Counters Using VHDL SEQUENTIAL ARITHMETIC Serial Adder/Subtracter Serial-Parallel Multiplication Fast Multiplication Implementation of Sequential Arithmetic in VHDL ASYNCHRONOUS SEQUENTIAL CIRCUITS Pulse Mode Circuits Fundamental Mode Circuits Cycles, Races, and Hazards Fundamental Mode Outputs INTRODUCTION TO TESTABILITY Controllability and Observability Deterministic Testability versus Random Testability Test of Integrated Circuits Fault Models Test Sets and Test Generation Topology-based Testability Analysis Simulation-based Testability Analysis Fault Analysis and Fault-based Testability Analysis Testability Matrices Design-for-Testability.…”

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