Cargando…
PACE3: a large dynamic range analog memory front-end ASIC assembly for the charge readout of silicon sensors
This paper describes the architecture of PACE3 and the key design parameters for a large dynamic range front-end amplification and low noise analog memory. Measured results from PACE3 are presented characterizing the chip's performance in terms of gain, pulse shaping characteristics, noise, pow...
Autores principales: | , , , , , , , , , , , , , , |
---|---|
Lenguaje: | eng |
Publicado: |
2006
|
Materias: | |
Acceso en línea: | http://cds.cern.ch/record/1014261 |