Development of a CMOS SOI pixel detector

We have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 m fullydepleted- SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5mm2 consisti...

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Detalles Bibliográficos
Autores principales: Ishino, Hirokazu, Arai, Y, Hazumi, M, Ikegami, Y, Kohriki, T, Tajima, O, Terada, S, Tsuboyama, T, Unno, Y, Ushiroda, Y, Ikeda, H, Hara, K, Ishino, H, Kawasaki, T, Miyake, H, Martin, E, Varner, G, Tajima, H, Ohno, M, Fukuda, K, Komatsubara, H, Ida, J
Lenguaje:eng
Publicado: CERN 2007
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.5170/CERN-2007-001.263
http://cds.cern.ch/record/1027476
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author Ishino, Hirokazu
Arai, Y
Hazumi, M
Ikegami, Y
Kohriki, T
Tajima, O
Terada, S
Tsuboyama, T
Unno, Y
Ushiroda, Y
Ikeda, H
Hara, K
Ishino, H
Kawasaki, T
Miyake, H
Martin, E
Varner, G
Tajima, H
Ohno, M
Fukuda, K
Komatsubara, H
Ida, J
author_facet Ishino, Hirokazu
Arai, Y
Hazumi, M
Ikegami, Y
Kohriki, T
Tajima, O
Terada, S
Tsuboyama, T
Unno, Y
Ushiroda, Y
Ikeda, H
Hara, K
Ishino, H
Kawasaki, T
Miyake, H
Martin, E
Varner, G
Tajima, H
Ohno, M
Fukuda, K
Komatsubara, H
Ida, J
author_sort Ishino, Hirokazu
collection CERN
description We have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 m fullydepleted- SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5mm2 consisting of 20 x 20 um2 pixels have been designed and manufactured. Performance tests with a laser light illumination and a . ray radioactive source indicate successful operation of the detector. We also brie y discuss the back gate effect as well as the simulation study.
id cern-1027476
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2007
publisher CERN
record_format invenio
spelling cern-10274762019-09-30T06:29:59Zdoi:10.5170/CERN-2007-001.263http://cds.cern.ch/record/1027476engIshino, HirokazuArai, YHazumi, MIkegami, YKohriki, TTajima, OTerada, STsuboyama, TUnno, YUshiroda, YIkeda, HHara, KIshino, HKawasaki, TMiyake, HMartin, EVarner, GTajima, HOhno, MFukuda, KKomatsubara, HIda, JDevelopment of a CMOS SOI pixel detectorDetectors and Experimental TechniquesWe have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 m fullydepleted- SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5mm2 consisting of 20 x 20 um2 pixels have been designed and manufactured. Performance tests with a laser light illumination and a . ray radioactive source indicate successful operation of the detector. We also brie y discuss the back gate effect as well as the simulation study.CERNoai:cds.cern.ch:10274762007
spellingShingle Detectors and Experimental Techniques
Ishino, Hirokazu
Arai, Y
Hazumi, M
Ikegami, Y
Kohriki, T
Tajima, O
Terada, S
Tsuboyama, T
Unno, Y
Ushiroda, Y
Ikeda, H
Hara, K
Ishino, H
Kawasaki, T
Miyake, H
Martin, E
Varner, G
Tajima, H
Ohno, M
Fukuda, K
Komatsubara, H
Ida, J
Development of a CMOS SOI pixel detector
title Development of a CMOS SOI pixel detector
title_full Development of a CMOS SOI pixel detector
title_fullStr Development of a CMOS SOI pixel detector
title_full_unstemmed Development of a CMOS SOI pixel detector
title_short Development of a CMOS SOI pixel detector
title_sort development of a cmos soi pixel detector
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.5170/CERN-2007-001.263
http://cds.cern.ch/record/1027476
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