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Low-noise design issues for analog front-end electronics in 130 nm and 90 nm CMOS technologies
Deep sub-micron CMOS technologies provide wellestablished solutions to the implementation of low-noise front-end electronics in various detector applications. The IC designers’ effort is presently shifting to 130 nm CMOS technologies, or even to the next technology node, to implement readout integra...
| Autores principales: | , , , , |
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| Lenguaje: | eng |
| Publicado: |
CERN
2007
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.5170/CERN-2007-001.483 http://cds.cern.ch/record/1034304 |