An FPGA based demonstrator for a topological processor in the future ATLAS L1-Calo trigger “GOLD”

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Abstract: The existing ATLAS trigger consists of three levels. The level 1 (L1) is an FPGAs based custom designed trigger, while the second and third levels are software based. The LHC machine plans to bring the beam energy to the maximum value of 7 TeV and to increase the luminosity in the coming y...

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Detalles Bibliográficos
Autores principales: Ebling, A, Bauss, B, Büscher, V, Degele, R, Ji, W, Meyer, C, Moritz, S, Schäfer, U, Simioni, E, Tapprogge, S, Wenzel, V
Lenguaje:eng
Publicado: 2011
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/7/01/C01067
http://cds.cern.ch/record/1398659

Internet

https://dx.doi.org/10.1088/1748-0221/7/01/C01067
http://cds.cern.ch/record/1398659

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