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Transient-induced latchup in CMOS integrated circuits
"Transient-Induced Latchup in CMOS Integrated Circuits equips the practicing engineer with all the tools needed to address this regularly occurring problem while becoming more proficient at IC layout. Ker and Hsu introduce the phenomenon and basic physical mechanism of latchup, explaining the c...
| Autores principales: | , |
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| Lenguaje: | eng |
| Publicado: |
Wiley-IEEE Press
2009
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| Acceso en línea: | http://cds.cern.ch/record/1480921 |