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Variation Tolerant On-Chip Interconnects
This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm t...
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Lenguaje: | eng |
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Springer
2012
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Acceso en línea: | https://dx.doi.org/10.1007/978-1-4614-0131-5 http://cds.cern.ch/record/1503696 |