Design of the 65 nm CLICpix demonstrator chip

A hybrid pixel detector ASIC designed to be used in the vertex detector for the CLIC experiment is presented in this note. It has been designed using a commercial 65 nm CMOS technology. The main features include simultaneous 4-bit TOT and TOA measurements with 10 ns accuracy, a spatial resolution of...

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Detalles Bibliográficos
Autores principales: Valerio, P., Ballabriga, R., Campbell, M.
Lenguaje:eng
Publicado: 2012
Materias:
Detectors and Experimental Techniques
Acceso en línea:http://cds.cern.ch/record/1507691
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author Valerio, P.
Ballabriga, R.
Campbell, M.
author_facet Valerio, P.
Ballabriga, R.
Campbell, M.
author_sort Valerio, P.
collection CERN
description A hybrid pixel detector ASIC designed to be used in the vertex detector for the CLIC experiment is presented in this note. It has been designed using a commercial 65 nm CMOS technology. The main features include simultaneous 4-bit TOT and TOA measurements with 10 ns accuracy, a spatial resolution of 3 um (the pixel size is 25x25 um), an on-chip data compression scheme and power pulsing capability. A prototype with a fully featured array of 64 by 64 pixels has been designed and produced. Testing on the prototype is ongoing.
id cern-1507691
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2012
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spelling cern-15076912019-09-30T06:29:59Zhttp://cds.cern.ch/record/1507691engValerio, P.Ballabriga, R.Campbell, M.Design of the 65 nm CLICpix demonstrator chipDetectors and Experimental TechniquesA hybrid pixel detector ASIC designed to be used in the vertex detector for the CLIC experiment is presented in this note. It has been designed using a commercial 65 nm CMOS technology. The main features include simultaneous 4-bit TOT and TOA measurements with 10 ns accuracy, a spatial resolution of 3 um (the pixel size is 25x25 um), an on-chip data compression scheme and power pulsing capability. A prototype with a fully featured array of 64 by 64 pixels has been designed and produced. Testing on the prototype is ongoing.LCD-Note-2012-018oai:cds.cern.ch:15076912012
spellingShingle Detectors and Experimental Techniques
Valerio, P.
Ballabriga, R.
Campbell, M.
Design of the 65 nm CLICpix demonstrator chip
title Design of the 65 nm CLICpix demonstrator chip
title_full Design of the 65 nm CLICpix demonstrator chip
title_fullStr Design of the 65 nm CLICpix demonstrator chip
title_full_unstemmed Design of the 65 nm CLICpix demonstrator chip
title_short Design of the 65 nm CLICpix demonstrator chip
title_sort design of the 65 nm clicpix demonstrator chip
topic Detectors and Experimental Techniques
url http://cds.cern.ch/record/1507691
work_keys_str_mv AT valeriop designofthe65nmclicpixdemonstratorchip
AT ballabrigar designofthe65nmclicpixdemonstratorchip
AT campbellm designofthe65nmclicpixdemonstratorchip

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